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author | Martin Roth <martin.roth@se-eng.com> | 2013-07-09 21:46:01 -0600 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-11 22:36:19 +0200 |
commit | 0cb07e3476d9408d0935253f9f26c0a8ddc28401 (patch) | |
tree | b449dc02d522ad013ab4b18e10e17e7e95fde235 /src/include/ehci.h | |
parent | cbe2edefb93ed3ba0a4b08f72a9b208429920675 (diff) | |
download | coreboot-0cb07e3476d9408d0935253f9f26c0a8ddc28401.tar.xz |
include: Fix spelling
Change-Id: Iadc813bc8208278996b2b1aa20cfb156ec06fac9
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/3755
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/ehci.h')
-rw-r--r-- | src/include/ehci.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/ehci.h b/src/include/ehci.h index b096f42761..f9203522a5 100644 --- a/src/include/ehci.h +++ b/src/include/ehci.h @@ -161,7 +161,7 @@ struct ehci_regs { #define USBMODE_CM_IDLE (0<<0) /* idle state */ /* Moorestown has some non-standard registers, partially due to the fact that - * its EHCI controller has both TT and LPM support. HOSTPCx are extentions to + * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to * PORTSCx */ #define HOSTPC0 0x84 /* HOSTPC extension */ |