diff options
| author | Julius Werner <jwerner@chromium.org> | 2015-12-16 16:07:39 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-01-21 09:05:06 +0100 |
| commit | 757943c7d1ebdc109744aea37d3d999bf608a806 (patch) | |
| tree | 8dfa5ac4c6fcc13d4a607e84b0081627478629d3 /src/include/memlayout.h | |
| parent | aaf2841ff7630a736ceb9e23d0144c61eaaba957 (diff) | |
| download | coreboot-757943c7d1ebdc109744aea37d3d999bf608a806.tar.xz | |
memlayout: Fix unified CBFS_CACHE macro
commit a8aef3ac (cbfs_spi: Initialize spi_flash when initializing
cbfs_cache) introduced a bug that makes the rarely-used unified
CBFS_CACHE() memlayout macro break when used in conjunction with
cbfs_spi.c (since that macro does not define a separate
postram_cbfs_cache region). This patch fixes the problem by making all
three region names always available for both the unified and split
macros in every stage (and adds code to ensure we don't reinitialize
the same buffer again in romstage, which might be a bad idea if
previous mappings are still in use).
BRANCH=None
BUG=None
TEST=Compiled for both kinds of macros, manually checked symbols in
disassembled stages.
Change-Id: I114933e93080c8eceab04bfdba3aabf0f75f8ef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0f270f88e54b42afb8b5057b0773644c4ef357ef
Original-Change-Id: If172d9fa3d1fe587aa449bd4de7b5ca87d0f4915
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/318834
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12933
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/memlayout.h')
| -rw-r--r-- | src/include/memlayout.h | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/src/include/memlayout.h b/src/include/memlayout.h index 3178bc4893..42d56082fa 100644 --- a/src/include/memlayout.h +++ b/src/include/memlayout.h @@ -63,6 +63,10 @@ STR(name must be aligned to expected_align!)); \ SYMBOL(e##name, addr + size) +#define ALIAS_REGION(name, alias) \ + _##alias = _##name; \ + _e##alias = _e##name; + /* Declare according to SRAM/DRAM ranges in SoC hardware-defined address map. */ #define SRAM_START(addr) SYMBOL(sram, addr) @@ -77,20 +81,23 @@ REGION(preram_cbmem_console, addr, size, 4) /* Use either CBFS_CACHE (unified) or both (PRERAM|POSTRAM)_CBFS_CACHE */ -#define CBFS_CACHE(addr, size) REGION(cbfs_cache, addr, size, 4) +#define CBFS_CACHE(addr, size) \ + REGION(cbfs_cache, addr, size, 4) \ + ALIAS_REGION(cbfs_cache, preram_cbfs_cache) \ + ALIAS_REGION(cbfs_cache, postram_cbfs_cache) -#if ENV_ROMSTAGE - #define PRERAM_CBFS_CACHE(addr, size) CBFS_CACHE(addr, size) +#if defined(__PRE_RAM__) + #define PRERAM_CBFS_CACHE(addr, size) \ + REGION(preram_cbfs_cache, addr, size, 4) \ + ALIAS_REGION(preram_cbfs_cache, cbfs_cache) #define POSTRAM_CBFS_CACHE(addr, size) \ REGION(postram_cbfs_cache, addr, size, 4) -#elif defined(__PRE_RAM__) - #define PRERAM_CBFS_CACHE(addr, size) CBFS_CACHE(addr, size) - #define POSTRAM_CBFS_CACHE(addr, size) \ - REGION(unused_cbfs_cache, addr, size, 4) #else #define PRERAM_CBFS_CACHE(addr, size) \ - REGION(unused_cbfs_cache, addr, size, 4) - #define POSTRAM_CBFS_CACHE(addr, size) CBFS_CACHE(addr, size) + REGION(preram_cbfs_cache, addr, size, 4) + #define POSTRAM_CBFS_CACHE(addr, size) \ + REGION(postram_cbfs_cache, addr, size, 4) \ + ALIAS_REGION(postram_cbfs_cache, cbfs_cache) #endif /* Careful: 'INCLUDE <filename>' must always be at the end of the output line */ |