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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-06-28 12:14:33 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2016-06-29 19:20:44 +0200 |
| commit | 78461a9d55de07f3187b48dfd6abca48db90e906 (patch) | |
| tree | 123492b0df5a0ba054fdb5d68d4ba4e97b3f744d /src/include/nhlt.h | |
| parent | 9d8b2ffb4978e4d87f85d6b7b92433594d95b0aa (diff) | |
| download | coreboot-78461a9d55de07f3187b48dfd6abca48db90e906.tar.xz | |
soc/intel/apollolake: Change PCI macros to match Skylake
Change PCI macros in such a way they can be transparently used across
romstage and ramstage.
Change-Id: Idc708c1990f2fc1d941bb82efcb0a697524f2eca
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15483
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/include/nhlt.h')
0 files changed, 0 insertions, 0 deletions