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| author | Stefan Reinauer <reinauer@chromium.org> | 2011-09-27 16:26:05 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-10-13 20:00:22 +0200 |
| commit | 491e2a29b9b29565f4023ac7ce32dbb5c284cb6e (patch) | |
| tree | 8e9363f884486c28ad4a9a755330f22891ddb58a /src/include/pc80 | |
| parent | af2c538ee5b3adae6a51bd0e5c725a6a18688554 (diff) | |
| download | coreboot-491e2a29b9b29565f4023ac7ce32dbb5c284cb6e.tar.xz | |
Enable/fix compilation of i8254 code in ram stage.
Change-Id: I3bbe795d8e6e576be9e94d6cd888e78a116ddbbd
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/254
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/include/pc80')
| -rw-r--r-- | src/include/pc80/i8254.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/include/pc80/i8254.h b/src/include/pc80/i8254.h index 82f31e6ff3..4c5e7039ce 100644 --- a/src/include/pc80/i8254.h +++ b/src/include/pc80/i8254.h @@ -20,8 +20,6 @@ #ifndef PC80_I8254_H #define PC80_I8254_H -void setup_i8254(void); - /* Ports for the 8254 timer chip */ #define TIMER0_PORT 0x40 #define TIMER1_PORT 0x41 @@ -60,4 +58,7 @@ void setup_i8254(void); #define PPCB_SPKR 0x02 /* Bit 1 */ #define PPCB_T2GATE 0x01 /* Bit 0 */ +#ifndef __ROMCC__ +void setup_i8254(void); +#endif #endif |