diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-11-12 20:23:52 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-11-13 17:56:46 +0000 |
| commit | 19325dac95fe50411d1c2a6caf580d3c3c76bd70 (patch) | |
| tree | e6cdd258b1468ffee68041aa6b025037e9e3f4e8 /src/include/program_loading.h | |
| parent | a1843d8411d3caebd0600421c2b6a4c6b0588c19 (diff) | |
| download | coreboot-19325dac95fe50411d1c2a6caf580d3c3c76bd70.tar.xz | |
vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1454
List of changes:
1. FSP-M Header:
- Add new UPD Lp5CccConfig
- Adjust Reservedxx UPD Offset
2. FSP-S Header:
- Adjust UPD Offset for Reservedxx, PsOnEnable, RpPtmBytes, PmSupport,
GtFreqMax, Hwp, TccActivationOffset, Cx, PchLockDownGlobalSmi,
PcieRpLtrMaxSnoopLatency, PcieRpLtrMaxNoSnoopLatency, UnusedUpdSpace45
Change-Id: I973f48b2af0336f04ee16cd1c4c91940a49af0e3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47244
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/program_loading.h')
0 files changed, 0 insertions, 0 deletions