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authorLee Leahy <leroy.p.leahy@intel.com>2015-06-26 11:15:42 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-07-23 16:41:56 +0200
commit0be6d939596249c6a0d6790648cadd7812ffe427 (patch)
tree68ca2faf0ac86771821a7277772f91d81b7aa57e /src/include/smbios.h
parentcaa5149b1ef4a77e9ce9abf65bbfcd54232ea129 (diff)
downloadcoreboot-0be6d939596249c6a0d6790648cadd7812ffe427.tar.xz
intel/common: Add SMBIOS memory width
Add SMBIOS symbols to define the memory width. Update the Intel common code to display the memory width and provide the memory width to SMBIOS. Also display the memory frequency, size and bus width in decimal. BRANCH=none BUG=None TEST=None Change-Id: I67b814d79fdbbf6ce65ac6b4a8282ab15fb91369 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0e59c7260afd180f3adcbeda7cef1b9eca3ed846 Original-Change-Id: Ibd26812c2aad4deaab62111b1e018be69c4faa7b Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/282115 Original-Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11032 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/smbios.h')
-rw-r--r--src/include/smbios.h42
1 files changed, 42 insertions, 0 deletions
diff --git a/src/include/smbios.h b/src/include/smbios.h
index 66d2b2f541..b654c23169 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -77,6 +77,48 @@ const char *smbios_mainboard_family(void);
#define MEMORY_TYPE_DETAIL_UNBUFFERED (1 << 14)
typedef enum {
+ MEMORY_BUS_WIDTH_8 = 0,
+ MEMORY_BUS_WIDTH_16 = 1,
+ MEMORY_BUS_WIDTH_32 = 2,
+ MEMORY_BUS_WIDTH_64 = 3,
+ MEMORY_BUS_WIDTH_128 = 4,
+ MEMORY_BUS_WIDTH_256 = 5,
+ MEMORY_BUS_WIDTH_512 = 6,
+ MEMORY_BUS_WIDTH_1024 = 7,
+ MEMORY_BUS_WIDTH_MAX = 7,
+} smbios_memory_bus_width;
+
+typedef enum {
+ MEMORY_DEVICE_OTHER = 0x01,
+ MEMORY_DEVICE_UNKNOWN = 0x02,
+ MEMORY_DEVICE_DRAM = 0x03,
+ MEMORY_DEVICE_EDRAM = 0x04,
+ MEMORY_DEVICE_VRAM = 0x05,
+ MEMORY_DEVICE_SRAM = 0x06,
+ MEMORY_DEVICE_RAM = 0x07,
+ MEMORY_DEVICE_ROM = 0x08,
+ MEMORY_DEVICE_FLASH = 0x09,
+ MEMORY_DEVICE_EEPROM = 0x0A,
+ MEMORY_DEVICE_FEPROM = 0x0B,
+ MEMORY_DEVICE_EPROM = 0x0C,
+ MEMORY_DEVICE_CDRAM = 0x0D,
+ MEMORY_DEVICE_3DRAM = 0x0E,
+ MEMORY_DEVICE_SDRAM = 0x0F,
+ MEMORY_DEVICE_SGRAM = 0x10,
+ MEMORY_DEVICE_RDRAM = 0x11,
+ MEMORY_DEVICE_DDR = 0x12,
+ MEMORY_DEVICE_DDR2 = 0x13,
+ MEMORY_DEVICE_DDR2_FB_DIMM = 0x14,
+ MEMORY_DEVICE_DDR3 = 0x18,
+ MEMORY_DEVICE_DBD2 = 0x19,
+ MEMORY_DEVICE_DDR4 = 0x1A,
+ MEMORY_DEVICE_LPDDR = 0x1B,
+ MEMORY_DEVICE_LPDDR2 = 0x1C,
+ MEMORY_DEVICE_LPDDR3 = 0x1D,
+ MEMORY_DEVICE_LPDDR4 = 0x1E,
+} smbios_memory_device_type;
+
+typedef enum {
MEMORY_FORMFACTOR_OTHER = 0x01,
MEMORY_FORMFACTOR_UNKNOWN = 0x02,
MEMORY_FORMFACTOR_SIMM = 0x03,