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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-04-28 18:21:25 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-30 00:18:46 +0200 |
| commit | bdd98254abf964692f193fe42ebffbd01d0b22b8 (patch) | |
| tree | 9579a91205bc6839ec6097a29fb5a8418b26f9c9 /src/include/spd_ddr2.h | |
| parent | 6e944c467ca28a8c4d7d0c0ff4b6e2ad8232a55b (diff) | |
| download | coreboot-bdd98254abf964692f193fe42ebffbd01d0b22b8.tar.xz | |
cbmem: Identify the FSP areas in CBMEM
Add identifers and descriptions for the FSP areas within CBMEM.
BRANCH=none
BUG=None
TEST=Build for Braswell and Skylake boards using FSP 1.1.
Change-Id: I4d58f7f08cfbc17f3aef261c835b92d8d65f6622
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10026
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/spd_ddr2.h')
0 files changed, 0 insertions, 0 deletions