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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-04 13:34:23 -0500 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-06-10 05:33:53 +0200 |
| commit | bbd2647b388320b10ae836f65b3d35754113dc02 (patch) | |
| tree | b4eae2af7822cad57335ce516f66b83aac3e70d4 /src/include/spi-generic.h | |
| parent | efc01f0d22dc72c9c156740cf334ee8ac2cfe6cd (diff) | |
| download | coreboot-bbd2647b388320b10ae836f65b3d35754113dc02.tar.xz | |
northbridge/amd/amdmct: Honor MMCONF_BASE_ADDRESS
The MMIO hole start address was hardcoded on AMD Family 10h
systems. Use the MMCONF_BASE_ADDRESS Kconfig setting instead.
Change-Id: I204e904d96d14e99529fa5e524fd73e6ea256dc0
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/10427
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/spi-generic.h')
0 files changed, 0 insertions, 0 deletions