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authorDuncan Laurie <dlaurie@chromium.org>2012-10-10 14:21:23 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-11-12 17:09:21 +0100
commit23b0053586974e0db70349a272d8cc09167fb4cb (patch)
tree1fa83fb40811ea1b4261d97ed36dbc8fc4428c11 /src/include/spi.h
parenta571c70c14a86d242be39fc12610b2519499379f (diff)
downloadcoreboot-23b0053586974e0db70349a272d8cc09167fb4cb.tar.xz
SPI: Fix and enable Fast Read support
- Fix handling of 5-byte Fast Read command in the ICH SPI driver. This fix is ported from the U-boot driver. - Allow CONFIG_SPI_FLASH_NO_FAST_READ to be overridden by defining a name for the bool in Kconfig and removing the forced select in southbridge config - Fix use of CONFIG_SPI_FLASH_NO_FAST_READ in SPI drivers to use #if instead of #ifdef - Relocate flash functions in SMM so they are usable. This really only needs to happen for read function pointer since it uses a global function rather than a static one from the chip, but it is good to ensure the rest are set up correctly as well. Change-Id: Ic1bb0764cb111f96dd8a389d83b39fe8f5e72fbd Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1775 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/include/spi.h')
-rw-r--r--src/include/spi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/spi.h b/src/include/spi.h
index 7d195d002a..5fbe51e1ab 100644
--- a/src/include/spi.h
+++ b/src/include/spi.h
@@ -46,6 +46,7 @@
/* SPI opcodes */
#define SPI_OPCODE_WREN 0x06
+#define SPI_OPCODE_FAST_READ 0x0b
/*-----------------------------------------------------------------------
* Representation of a SPI slave, i.e. what we're communicating with.