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authorMartin Roth <martin@se-eng.com>2012-12-05 16:22:54 -0700
committerMarc Jones <marcj303@gmail.com>2012-12-12 22:34:16 +0100
commit3316cf2ff80f379b609115f375f73ef4b9e7d8f4 (patch)
tree451e03092e92a06782e4b058004e123b51c69e58 /src/include/spi.h
parentcf5aaaf1d25429fa6270c7d91a3e072dcf989079 (diff)
downloadcoreboot-3316cf2ff80f379b609115f375f73ef4b9e7d8f4.tar.xz
Claim the SPI bus before writes if the IMC ROM is present
The SB800 and Hudson now support adding the IMC ROM which runs from the same chip as coreboot. When the IMC is running, write or erase commands sent to the spi bus will fail, and the IMC will die. To fix this, we send a request to the IMC to stop fetching from the SPI rom while we write to it. This process (in one form or another) is required for writes to the SPI bus while the IMC is running. Because the IMC can take up to 500ms to respond every time we claim the bus, this patch tries to keep the number of times we need to do that to a minimum. We only need to claim the bus on writes, and using a counter for the semaphore allows us to call in once to claim the bus at the beginning of a number of transactions and it will stay claimed until we release it at the end of the transactions. Claim() - takes up to 500ms hit claim() - no delay erase() release() claim() - no delay write() release() Release() Change-Id: I4e003c5122a2ed47abce57ab8b92dee6aa4713ed Signed-off-by: Martin Roth <martin@se-eng.com> Reviewed-on: http://review.coreboot.org/1976 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/include/spi.h')
-rw-r--r--src/include/spi.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/include/spi.h b/src/include/spi.h
index 5fbe51e1ab..d394531712 100644
--- a/src/include/spi.h
+++ b/src/include/spi.h
@@ -48,6 +48,9 @@
#define SPI_OPCODE_WREN 0x06
#define SPI_OPCODE_FAST_READ 0x0b
+#define SPI_READ_FLAG 0x01
+#define SPI_WRITE_FLAG 0x02
+
/*-----------------------------------------------------------------------
* Representation of a SPI slave, i.e. what we're communicating with.
*
@@ -55,16 +58,17 @@
*
* bus: ID of the bus that the slave is attached to.
* cs: ID of the chip select connected to the slave.
+ * rw: Read or Write flag
*/
struct spi_slave {
unsigned int bus;
unsigned int cs;
+ unsigned int rw;
};
/*-----------------------------------------------------------------------
* Initialization, must be called once on start up.
*
- * TODO: I don't think we really need this.
*/
void spi_init(void);