diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-03-06 23:17:33 -0600 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2015-04-22 17:55:08 +0200 |
commit | bd74a4b2d25268f7035a4478da31f27baac2aecc (patch) | |
tree | 56740c02fe396df8ccf9fc2e7401542deeebf453 /src/include/stage_cache.h | |
parent | cac50506238507328b8ea0f4abd458869803e6c2 (diff) | |
download | coreboot-bd74a4b2d25268f7035a4478da31f27baac2aecc.tar.xz |
coreboot: common stage cache
Many chipsets were using a stage cache for reference code
or when using a relocatable ramstage. Provide a common
API for the chipsets to use while reducing code duplication.
Change-Id: Ia36efa169fe6bd8a3dbe07bf57a9729c7edbdd46
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8625
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/include/stage_cache.h')
-rw-r--r-- | src/include/stage_cache.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/src/include/stage_cache.h b/src/include/stage_cache.h new file mode 100644 index 0000000000..bde53307ae --- /dev/null +++ b/src/include/stage_cache.h @@ -0,0 +1,49 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef _STAGE_CACHE_H_ +#define _STAGE_CACHE_H_ + +#include <stddef.h> +#include <stdint.h> +#include <program_loading.h> + +enum { + STAGE_RAMSTAGE, + STAGE_REFCODE, +}; + +/* Create an empty stage cache. */ +void stage_cache_create_empty(void); +/* Recover existing stage cache. */ +void stage_cache_recover(void); +/* Cache the loaded stage provided according to the parameters. */ +void stage_cache_add(int stage_id, struct prog *stage); +/* Load the cached stage at given location returning the stage entry point. */ +void stage_cache_load_stage(int stage_id, struct prog *stage); +/* Fill in parameters for the external stage cache, if utilized. */ +void stage_cache_external_region(void **base, size_t *size); + +/* Metadata associated with each stage. */ +struct stage_cache { + uint64_t load_addr; + uint64_t entry_addr; +}; + +#endif /* _STAGE_CACHE_H_ */ |