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| author | Subrata <subrata.banik@intel.com> | 2015-07-14 16:46:40 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-08-29 07:23:57 +0000 |
| commit | d92f6127e109e5bb595b6726a9f7adb61eac2d9d (patch) | |
| tree | 635a88023d3aa31a1607967eedcc9859f047e304 /src/include/superio | |
| parent | 6cba16f6ef7b2a33634d6a6b5c5bf79db956edc7 (diff) | |
| download | coreboot-d92f6127e109e5bb595b6726a9f7adb61eac2d9d.tar.xz | |
intel/skylake: Implemented generic SPI driver for ROM/RAMSTAGE access.
Created generic library to implement SPI read, write, erase and
read status functionality for both ROMSTAGE and RAMSTAGE access.
BRANCH=NONE
BUG=chrome-os-partner:42115
TEST=Built for sklrvp and kunimitsu and verify SPI read, write,
erase success from ELOG.
Change-Id: Idf4ffdb550e2a3b87059554e8825a1182b448a8a
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 74907352931db78802298fe7280a39913a37f0c2
Original-Change-Id: Ib08da1b8825e2e88641acbac3863b926ec48afd9
Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/294444
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Subrata Banik <subrata.banik@intel.com>
Original-Commit-Queue: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: http://review.coreboot.org/11422
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/superio')
0 files changed, 0 insertions, 0 deletions