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author | Aaron Durbin <adurbin@chromium.org> | 2018-04-10 09:28:42 -0600 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-10 18:08:28 +0000 |
commit | 24de59702fc78d0a88dd895f87021dd6a5be70cf (patch) | |
tree | dde402be112a0eb29859427440caf53034c01c28 /src/include/timestamp.h | |
parent | e09ba47b8ba213e9a9d17c3fc0defb857e415100 (diff) | |
download | coreboot-24de59702fc78d0a88dd895f87021dd6a5be70cf.tar.xz |
soc/intel/apollolake: fix SPI input clock speed
On APL and GLK the i2c blocks use 133MHz input clock, but the
SPI blocks use a 100MHz input clock. Fix this so that the proper
target frequencies can be hit on the SPI controllers.
BUG=b:75306520
Change-Id: Iec36579894fa4633ac8d1035e6e7afec01af755f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/include/timestamp.h')
0 files changed, 0 insertions, 0 deletions