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authorStefan Reinauer <reinauer@google.com>2011-04-26 23:47:04 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-26 23:47:04 +0000
commit4885daadb33bea37ef3970696d3cf0d05e9852a3 (patch)
tree9b068b5645f5aa60fd310919c0a08ce3dea34b3f /src/include/uart8250.h
parent3187d0267d4b456eb43bca21a817c78687d6f73b (diff)
downloadcoreboot-4885daadb33bea37ef3970696d3cf0d05e9852a3.tar.xz
Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an
example. This newer version reflects the recent changes to further simplify the console code and partly gets rid of some hacks in the previous version. Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/uart8250.h')
-rw-r--r--src/include/uart8250.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/include/uart8250.h b/src/include/uart8250.h
index 217558a8d5..bbf2d8c8a9 100644
--- a/src/include/uart8250.h
+++ b/src/include/uart8250.h
@@ -124,6 +124,7 @@
#define UART_MSR_DCTS 0x01 /* Delta CTS */
#define UART_SCR 0x07
+#define UART_SPR 0x07
#ifndef __ROMCC__
@@ -136,6 +137,17 @@ void uart8250_tx_byte(unsigned base_port, unsigned char data);
*/
void uart8250_init(unsigned base_port, unsigned divisor);
void uart_init(void);
+
+/* and the same for memory mapped uarts */
+unsigned char uart8250_mem_rx_byte(unsigned base_port);
+int uart8250_mem_can_rx_byte(unsigned base_port);
+void uart8250_mem_tx_byte(unsigned base_port, unsigned char data);
+void uart8250_mem_init(unsigned base_port, unsigned divisor);
+u32 uart_mem_init(void);
+
+/* and special init for OXPCIe based cards */
+void oxford_init(void);
+
#endif
#endif /* UART8250_H */