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authorCorey Osgood <corey.osgood@gmail.com>2007-11-03 18:45:42 +0000
committerCorey Osgood <corey.osgood@gmail.com>2007-11-03 18:45:42 +0000
commit02b2365f02cd987b7d4306a82bccaad19494443d (patch)
treebcbdb8ecf83d7c415b81efc755c39fe6e9118320 /src/include
parente6409f218c2278bfe3b64004478968f0b6207fdc (diff)
downloadcoreboot-02b2365f02cd987b7d4306a82bccaad19494443d.tar.xz
This patch is some small changes to the vt8237r to prepare it for
the Jetway J7F2 patch that should be coming soon, and also moves most defines into vt8237r.h. I've changed some of the values from u32 to u8, because that's all they should ever need to be. Also includes doxygenized comments! Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2937 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
-rw-r--r--src/include/spd.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/spd.h b/src/include/spd.h
index b0c00ff094..27042c90c5 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -105,6 +105,7 @@
#define SPD_MEMORY_TYPE_SGRAM_DDR 6
#define SPD_MEMORY_TYPE_SDRAM_DDR 7
#define SPD_MEMORY_TYPE_SDRAM_DDR2 8
+#define SPD_MEMORY_TYPE_SDRAM_DDR3 0xb
/* SPD_MODULE_VOLTAGE values. */
#define SPD_VOLTAGE_TTL 0 /* 5.0 Volt/TTL */