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authorAaron Durbin <adurbin@chromium.org>2016-12-03 17:04:06 -0600
committerAaron Durbin <adurbin@chromium.org>2016-12-08 16:11:01 +0100
commit305c0cafaa2fe7d766918898692971b70259b4ac (patch)
tree1d789a30ec88cc20ef5c2320e6fff646b4da553e /src/include
parentcd0bc987be61313f40ab92707ed7574ae591dfc4 (diff)
downloadcoreboot-305c0cafaa2fe7d766918898692971b70259b4ac.tar.xz
drivers/spi: provide a mechanism to obtain the SPI flash boot device
The MRC cache wants to be able to access the SPI flash boot device. Allow an easy way to provide that so that there isn't duplicate spi_flash objects representing the same device. BUG=chrome-os-partner:56151 Change-Id: Iba92e8bb8a6060cdd327b10f5f8ec23ac61101e7 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17715 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/spi_flash.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index 5a9237869f..6b89012a26 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -88,4 +88,8 @@ int spi_flash_volatile_group_end(const struct spi_flash *flash);
int chipset_volatile_group_begin(const struct spi_flash *flash);
int chipset_volatile_group_end(const struct spi_flash *flash);
+/* Return spi_flash object reference for the boot device. This is only valid
+ * if CONFIG_BOOT_DEVICE_SPI_FLASH is enabled. */
+const struct spi_flash *boot_device_spi_flash(void);
+
#endif /* _SPI_FLASH_H_ */