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| author | Marc Jones <marc.jones@se-eng.com> | 2013-10-29 17:57:30 -0600 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2013-12-04 18:45:13 +0100 |
| commit | 54b8e7a0bba7787eca737506cb5d85bf408344d2 (patch) | |
| tree | 395e0c0b53505578ac87531d0db67f6dd8a0af07 /src/include | |
| parent | a5adfed6e33c1cb43971f7fe3f5cfc90e4f42846 (diff) | |
| download | coreboot-54b8e7a0bba7787eca737506cb5d85bf408344d2.tar.xz | |
Add Intel FSP northbridge support Sandybridge and Ivybridge
Add support for Sandybridge and Ivybridge using the Intel FSP.
The FSP is different enough to warrant its own source files.
This source handle the majority of FSP interaction.
"Intel® Firmware Support Package (Intel® FSP) provides key
programming information for initializing Intel® silicon and can be
easily integrated into a boot loader of the developer’s choice.
It is easy to adopt, scalable to design, reduces time-to-market, and
is economical to build."
http://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html
Change-Id: Ib879c6b0fbf2eb1cbf929a87f592df29ac48bcc5
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/4015
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cbmem.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cbmem.h b/src/include/cbmem.h index b3d3fff281..0c32111ebc 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -73,6 +73,7 @@ #define CBMEM_ID_EHCI_DEBUG 0xe4c1deb9 #define CBMEM_ID_NONE 0x00000000 #define CBMEM_ID_AGESA_RUNTIME 0x41474553 +#define CBMEM_ID_HOB_POINTER 0x484f4221 #ifndef __ASSEMBLER__ #include <stdint.h> |