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authorVladimir Serbinenko <phcoder@gmail.com>2014-05-18 11:05:56 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-07-29 00:52:28 +0200
commit7686a56574a6773717b49a51786f301970d1c69c (patch)
tree40dcb474d1d0c88095e45c37044e25df5b6e2f20 /src/include
parentb37ee1ee7c69836cfb333c13f787a1c3ba580b8f (diff)
downloadcoreboot-7686a56574a6773717b49a51786f301970d1c69c.tar.xz
sandy/ivybridge: Native raminit.
Based on damo22's work and my X230 tracing. Works for my X230 in a variety of RAM configs. Also-By: Damien Zammit <damien@zamaudio.com> Change-Id: I1aa024c55a8416fc53b25e7123037df0e55a2769 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: http://review.coreboot.org/5786 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/dram/ddr3.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h
index b19c51c15b..ef0d0ec606 100644
--- a/src/include/device/dram/ddr3.h
+++ b/src/include/device/dram/ddr3.h
@@ -37,6 +37,7 @@
* @{
*/
#define TCK_1066MHZ 240
+#define TCK_933MHZ 275
#define TCK_800MHZ 320
#define TCK_666MHZ 384
#define TCK_533MHZ 480
@@ -137,6 +138,8 @@ typedef struct dimm_attr_st {
u16 cas_supported;
/* Flags extracted from SPD */
dimm_flags_t flags;
+ /* SDRAM width */
+ u8 width;
/* Number of ranks */
u8 ranks;
/* Number or row address bits */
@@ -158,6 +161,8 @@ typedef struct dimm_attr_st {
u32 tWTR;
u32 tRTP;
u32 tFAW;
+
+ u8 reference_card;
} dimm_attr;
/** Result of the SPD decoding process */