spi: Clean up SPI flash driver interface

RW flag was added to spi_slave structure to get around a requirement on
some AMD flash controllers that need to group together all spi volatile
operations (write/erase). This rw flag is not a property or attribute of
the SPI slave or controller. Thus, instead of saving it in spi_slave
structure, clean up the SPI flash driver interface. This allows
chipsets/mainboards (that require volatile operations to be grouped) to
indicate beginning and end of such grouped operations.

New user APIs are added to allow users to perform probe, read, write,
erase, volatile group begin and end operations. Callbacks defined in
spi_flash structure are expected to be used only by the SPI flash
driver. Any chipset that requires grouping of volatile operations can
select the newly added Kconfig option SPI_FLASH_HAS_VOLATILE_GROUP and
define callbacks for chipset_volatile_group_{begin,end}.

spi_claim_bus/spi_release_bus calls have been removed from the SPI flash
chip drivers which end up calling do_spi_flash_cmd since it already has
required calls for claiming and releasing SPI bus before performing a
read/write operation.

BUG=None
BRANCH=None
TEST=Compiles successfully.

Change-Id: Idfc052e82ec15b6c9fa874cee7a61bd06e923fbf
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17462
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2 files changed, 47 insertions, 24 deletions

diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
index 9097f48c13..ee02394096 100644
--- a/src/include/spi-generic.h
+++ b/src/include/spi-generic.h
@@ -24,9 +24,6 @@
 #define SPI_OPCODE_WREN 0x06
 #define SPI_OPCODE_FAST_READ 0x0b
 
-#define SPI_READ_FLAG	0x01
-#define SPI_WRITE_FLAG	0x02
-
 /*-----------------------------------------------------------------------
  * Representation of a SPI slave, i.e. what we're communicating with.
  *
@@ -34,7 +31,6 @@
  *
  *   bus:	ID of the bus that the slave is attached to.
  *   cs:	ID of the chip select connected to the slave.
- *   rw: 	Read or Write flag
  *   max_transfer_size: maximum amount of bytes which can be sent in a single
  *              read or write transaction, usually this is a controller
  *              property, kept in the slave structure for convenience. Zero in
@@ -43,7 +39,6 @@
 struct spi_slave {
 	unsigned int	bus;
 	unsigned int	cs;
-	unsigned int	rw;
 	unsigned int	max_transfer_size;
 	int force_programmer_specific;
 	struct spi_flash * (*programmer_specific_probe) (struct spi_slave *spi);
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index 52de184302..5cb68299e9 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -17,35 +17,63 @@
 
 #include <stdint.h>
 #include <stddef.h>
-#include <console/console.h>
-#include <spi-generic.h>
 #include <boot/coreboot_tables.h>
 
 struct spi_flash {
 	struct spi_slave *spi;
-
-	const char	*name;
-
-	u32		size;
-
-	u32		sector_size;
-
-	u8		erase_cmd;
-
-	u8		status_cmd;
-
-	/* All callbacks return 0 on success and != 0 on error. */
-	int		(*read)(struct spi_flash *flash, u32 offset,
+	const char *name;
+	u32 size;
+	u32 sector_size;
+	u8 erase_cmd;
+	u8 status_cmd;
+	/*
+	 * Internal functions are expected to be called ONLY by spi flash
+	 * driver. External components should only use the public API calls
+	 * spi_flash_{read,write,erase,status,volatile_group_begin,
+	 * volatile_group_end}.
+	 */
+	int (*internal_read)(const struct spi_flash *flash, u32 offset,
 				size_t len, void *buf);
-	int		(*write)(struct spi_flash *flash, u32 offset,
+	int (*internal_write)(const struct spi_flash *flash, u32 offset,
 				size_t len, const void *buf);
-	int		(*erase)(struct spi_flash *flash, u32 offset,
+	int (*internal_erase)(const struct spi_flash *flash, u32 offset,
 				size_t len);
-	int		(*status)(struct spi_flash *flash, u8 *reg);
+	int (*internal_status)(const struct spi_flash *flash, u8 *reg);
 };
 
+void lb_spi_flash(struct lb_header *header);
+
+/* SPI Flash Driver Public API */
 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs);
 
-void lb_spi_flash(struct lb_header *header);
+/* All the following functions return 0 on success and non-zero on error. */
+int spi_flash_read(const struct spi_flash *flash, u32 offset, size_t len,
+		   void *buf);
+int spi_flash_write(const struct spi_flash *flash, u32 offset, size_t len,
+		    const void *buf);
+int spi_flash_erase(const struct spi_flash *flash, u32 offset, size_t len);
+int spi_flash_status(const struct spi_flash *flash, u8 *reg);
+/*
+ * Some SPI controllers require exclusive access to SPI flash when volatile
+ * operations like erase or write are being performed. In such cases,
+ * volatile_group_begin will gain exclusive access to SPI flash if not already
+ * acquired and volatile_group_end will end exclusive access if this was the
+ * last request in the group. spi_flash_{write,erase} operations call
+ * volatile_group_begin at the start of function and volatile_group_end after
+ * erase/write operation is performed. These functions can also be used by any
+ * components that wish to club multiple volatile operations into a single
+ * group.
+ */
+int spi_flash_volatile_group_begin(const struct spi_flash *flash);
+int spi_flash_volatile_group_end(const struct spi_flash *flash);
+
+/*
+ * These are callbacks for marking the start and end of volatile group as
+ * handled by the chipset. Not every chipset requires this special handling. So,
+ * these functions are expected to be implemented in Kconfig option for volatile
+ * group is enabled (SPI_FLASH_HAS_VOLATILE_GROUP).
+ */
+int chipset_volatile_group_begin(const struct spi_flash *flash);
+int chipset_volatile_group_end(const struct spi_flash *flash);
 
 #endif /* _SPI_FLASH_H_ */