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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-19 18:37:28 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-21 06:38:45 +0000 |
| commit | c2c634a089fa990418c363e2ff2e5ff70bdd3580 (patch) | |
| tree | 042e376cee473f72f143ed76768f50536ab323ef /src/include | |
| parent | 298619f6d9adde49b4279c906b0d20a41f919a61 (diff) | |
| download | coreboot-c2c634a089fa990418c363e2ff2e5ff70bdd3580.tar.xz | |
nb/sb/cpu: Drop Intel Rangeley support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.
Change-Id: I41589118579988617677cf48af5401bc35b23e05
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ids.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 70cf3aa339..18d6f601c1 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2583,8 +2583,6 @@ #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e41 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f -#define PCI_DEVICE_ID_INTEL_RANGELEY_LPC_MIN 0x1f38 -#define PCI_DEVICE_ID_INTEL_RANGELEY_LPC_MAX 0x1f3b #define PCI_DEVICE_ID_INTEL_TGP_LPC 0x27bc /* Intel 82801E (C-ICH) */ |