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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-07 19:24:23 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-10 19:34:20 +0100
commitcb141bce35d6b0ee08a14c1097fa19bc10e4d9e7 (patch)
tree2661632eee56b6ac5f31fc87d8b0fef67ce06aef /src/include
parent48e899d2d5d7adfccecbde5b75b7d8e7a1394af4 (diff)
downloadcoreboot-cb141bce35d6b0ee08a14c1097fa19bc10e4d9e7.tar.xz
usbdebug: Split PCI EHCI part
There are EHCI compatible host controllers on ARM without PCI bus architecture. Currently we have not come across one with the debug capability though. Change-Id: I8775c9814f6fdf8754f97265118a7186369d721d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5175 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_def.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index dae4e685b5..d8b655a8a4 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -181,6 +181,7 @@
#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */
#define PCI_CAP_ID_PCIX 0x07 /* PCIX */
#define PCI_CAP_ID_HT 0x08 /* Hypertransport */
+#define PCI_CAP_ID_EHCI_DEBUG 0x0A /* EHCI debug port */
#define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */
#define PCI_CAP_ID_PCIE 0x10 /* PCI Express */
#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */