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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-11-10 09:55:57 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-11-30 08:05:55 +0000
commitf1b4a7c9d4e8eb5884efab2d29f49812326f66e2 (patch)
tree13d856d5b031d7ff72b13fa59b32114b385472b4 /src/include
parentf90056268fe0280da600703baebf5a0623f019e1 (diff)
downloadcoreboot-f1b4a7c9d4e8eb5884efab2d29f49812326f66e2.tar.xz
elog: Add new wake source codes
Tiger Lake introduces new wake-capable devices, including thunderbolt ports, TCSS XHCI & XDCI as well as DMA ports. Add new ELOG_WAKE_SOURCE macros for each of these types of devices. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ie5dae6514c2776b30418a390c4da53bda0b2d456 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47395 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/elog.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/include/elog.h b/src/include/elog.h
index 8c50e00ba5..3071271b3e 100644
--- a/src/include/elog.h
+++ b/src/include/elog.h
@@ -120,6 +120,10 @@
#define ELOG_WAKE_SOURCE_PME_PCIE23 0x2a
#define ELOG_WAKE_SOURCE_PME_PCIE24 0x2b
#define ELOG_WAKE_SOURCE_GPIO 0x2c
+#define ELOG_WAKE_SOURCE_PME_TBT 0x2d
+#define ELOG_WAKE_SOURCE_PME_TCSS_XHCI 0x2e
+#define ELOG_WAKE_SOURCE_PME_TCSS_XDCI 0x2f
+#define ELOG_WAKE_SOURCE_PME_TCSS_DMA 0x30
struct elog_event_data_wake {
u8 source;