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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-06-04 16:09:44 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-06-09 17:02:26 +0200 |
| commit | 72179fad42e2858b08719061cccb2768f4546d17 (patch) | |
| tree | ed5b6d29d97f9a96fbe7f241169999274fa762d6 /src/include | |
| parent | 96fbc31027b8e208c264d96c04f45799cea3417e (diff) | |
| download | coreboot-72179fad42e2858b08719061cccb2768f4546d17.tar.xz | |
soc/intel/quark: Pass serial port address to FSP
Pass the serial port address to FSP using a UPD value in the MemoryInit
API.
TEST=Build and run on Galileo Gen2
Change-Id: I86449d80310b7b34ac503ebd2671a4052b080730
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15079
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include')
0 files changed, 0 insertions, 0 deletions