coreboot: config to cache ramstage outside CBMEM

Haswell was the original chipset to store the cache
in another area besides CBMEM. However, it was specific
to the implementation. Instead, provide a generic way
to obtain the location of the ramstage cache. This option
is selected using the CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
Kconfig option.

BUG=chrome-os-partner:23249
BRANCH=None
TEST=Built and booted with baytrail support. Also built for
     falco successfully.

Change-Id: I70d0940f7a8f73640c92a75fd22588c2c234241b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172602
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4876
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

1 files changed, 49 insertions, 0 deletions

diff --git a/src/include/ramstage_cache.h b/src/include/ramstage_cache.h
new file mode 100644
index 0000000000..5b0597a828
--- /dev/null
+++ b/src/include/ramstage_cache.h
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _RAMSTAGE_CACHE_
+#define _RAMSTAGE_CACHE_
+
+#if !defined(__PRE_RAM__)
+#error "ramstage_cache only used in romstage for loading ramstage."
+#endif
+
+/* This structure is saved along with the relocated ramstage program when
+ * CONFIG_RELOCATED_RAMSTAGE is employed.  For x86, it can used to protect
+ * the integrity of the ramstage program on S3 resume by saving a copy of
+ * the relocated ramstage in SMM space with the assumption that the SMM region
+ * cannot be altered from the OS. The magic value just serves as a quick sanity
+ * check. */
+
+#define RAMSTAGE_CACHE_MAGIC 0xf3c3a02a
+
+struct ramstage_cache {
+	uint32_t magic;
+	uint32_t entry_point;
+	uint32_t load_address;
+	uint32_t size;
+	char program[0];
+} __attribute__((packed));
+
+/* Chipset/Board function for obtaining cache location and size. */
+struct ramstage_cache *ramstage_cache_location(long *size);
+/* Chipset/Board function called when cache is invalid on resume. */
+void ramstage_cache_invalid(struct ramstage_cache *cache);
+
+#endif  /* _RAMSTAGE_CACHE_ */