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authorArthur Heymans <arthur@aheymans.xyz>2021-02-15 23:46:06 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-03-19 11:33:17 +0000
commitad0116c0327f575f0af184a2f4861848a49a0e2a (patch)
treed463c4b65a7957fac57e5b383783d05264a08946 /src/include
parent1afe20b1b2e6e7e9be3df5e21cffbdf8ee5a4c3f (diff)
downloadcoreboot-ad0116c0327f575f0af184a2f4861848a49a0e2a.tar.xz
cpu/x86/smm_loaderv2: Remove unused variables
Remove variables that are either constants or are just assigned but not used. Change-Id: I5d291a3464f30fc5d9f4b7233bde575010275973 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50784 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cpu/x86/smm.h14
1 files changed, 0 insertions, 14 deletions
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index b100bf800b..3375f4a144 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -132,12 +132,6 @@ static inline bool smm_points_to_smram(const void *ptr, const size_t len)
* into this field so the code doing the loading can manipulate the
* runtime's assumptions. e.g. updating the APIC id to CPU map to
* handle sparse APIC id space.
- * The following parameters are only used when X86_SMM_LOADER_VERSION2 is enabled.
- * - smm_entry - entry address of first CPU thread, all others will be tiled
- * below this address.
- * - smm_main_entry_offset - default entry offset (e.g 0x8000)
- * - smram_start - smaram starting address
- * - smram_end - smram ending address
*/
struct smm_loader_params {
void *stack_top;
@@ -150,14 +144,6 @@ struct smm_loader_params {
smm_handler_t handler;
struct smm_stub_params *stub_params;
-
- /* The following are only used by X86_SMM_LOADER_VERSION2 */
-#if CONFIG(X86_SMM_LOADER_VERSION2)
- uintptr_t smm_entry;
- uintptr_t smm_main_entry_offset;
- uintptr_t smram_start;
- uintptr_t smram_end;
-#endif
};
/* Both of these return 0 on success, < 0 on failure. */