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| author | Angel Pons <th3fanbus@gmail.com> | 2021-04-27 11:12:58 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-04-28 14:14:35 +0000 |
| commit | b45a769939a7c7b6016a29bf1c27c9794453c9f4 (patch) | |
| tree | 75ace5cd633e77204ed29b8f5a396457726913d4 /src/include | |
| parent | 9f7e08be614b2d2d23785cfdd4b1585ad75db78d (diff) | |
| download | coreboot-b45a769939a7c7b6016a29bf1c27c9794453c9f4.tar.xz | |
soc/intel: Add Kaby Lake PCH-U base device ID
Taken from Intel document 334658-003 (7th Generation Intel Processor
Family I/O for U/Y Platforms and 8th Generation Intel Processor Family
I/O for U Quad Core Platforms, Datasheet - Volume 1 of 2).
Change-Id: I1d48c8868e1e5d453d599ecec835938ce09935d0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52702
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Timofey Komarov <happycorsair@yandex.ru>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c6e456b0e1..496745b0b0 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2860,6 +2860,7 @@ #define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22 0x9d4e #define PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22 0x9d50 #define PCI_DEVICE_ID_INTEL_UPT_LP_SUPER_SKU 0x9d51 +#define PCI_DEVICE_ID_INTEL_UPT_LP_U_BASE 0x9d53 #define PCI_DEVICE_ID_INTEL_UPT_LP_U_PREMIUM 0x9d58 #define PCI_DEVICE_ID_INTEL_UPT_LP_Y_PREMIUM 0x9d56 #define PCI_DEVICE_ID_INTEL_APL_LPC 0x5ae8 |