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authorAndrey Petrov <andrey.petrov@intel.com>2016-11-08 08:30:06 -0800
committerAaron Durbin <adurbin@chromium.org>2016-11-30 16:46:16 +0100
commitef9a9ea3b7585354d447ab0b3145e1b357226647 (patch)
treef669c9bf0b145e1212ac40cb33404c2f24de7bb5 /src/include
parent4ed99ad067a7bd9f5ef6004c7b0e5f9f7edbe0d5 (diff)
downloadcoreboot-ef9a9ea3b7585354d447ab0b3145e1b357226647.tar.xz
soc/intel/common: Add save/restore for variable MRC data
Piggy-back on existing MRC cache infrastructure to store variable MRC data. Only one set of data can be valid at given point of time. Currently this magically happens because region alignment is forced to 0x1000 and region itself is of the same size. This needs to be somehow programmatically enforced. Change-Id: I8a660d356ca760b8ff9907396fb9b34cb16cf1db Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/17320 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/elog.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/elog.h b/src/include/elog.h
index f2e587cdd5..501e30db3d 100644
--- a/src/include/elog.h
+++ b/src/include/elog.h
@@ -160,6 +160,7 @@ struct elog_event_data_me_extended {
#define ELOG_TYPE_MEM_CACHE_UPDATE 0xaa
#define ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL 0
#define ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY 1
+#define ELOG_MEM_CACHE_UPDATE_SLOT_VARIABLE 2
#define ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS 0
#define ELOG_MEM_CACHE_UPDATE_STATUS_FAIL 1
struct elog_event_mem_cache_update {