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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-03 00:35:15 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-04 15:59:23 +0000
commit3ee8b750f49b7c82e8b8787ee306017746e8c12a (patch)
treec2d5a9a2b35e561303e9a6088004e05a7b282421 /src/include
parent3855c01e0a9d9e9787652479576e882bcda9fde5 (diff)
downloadcoreboot-3ee8b750f49b7c82e8b8787ee306017746e8c12a.tar.xz
arch/io.h: Separate MMIO and PNP ops
Change-Id: Ie32f1d43168c277be46cdbd7fbfa2445d9899689 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31699 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/device.h1
-rw-r--r--src/include/device/mmio.h4
-rw-r--r--src/include/device/pnp_ops.h68
3 files changed, 69 insertions, 4 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h
index c794322d92..3b38322fcc 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -14,7 +14,6 @@
#include <device/resource.h>
#include <device/path.h>
#include <device/pci_type.h>
-#include <arch/io.h>
struct device;
struct pci_operations;
diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h
index bebf0cfbd4..34be1e8172 100644
--- a/src/include/device/mmio.h
+++ b/src/include/device/mmio.h
@@ -15,7 +15,7 @@
#ifndef __DEVICE_MMIO_H__
#define __DEVICE_MMIO_H__
-/* FIXME: We only want the volatile MMIO ops. */
-#include <arch/io.h>
+#include <arch/mmio.h>
+#include <endian.h>
#endif
diff --git a/src/include/device/pnp_ops.h b/src/include/device/pnp_ops.h
index 370ede8bdd..9086fdf67c 100644
--- a/src/include/device/pnp_ops.h
+++ b/src/include/device/pnp_ops.h
@@ -15,7 +15,73 @@
#ifndef __DEVICE_PNP_OPS_H__
#define __DEVICE_PNP_OPS_H__
-/* FIXME: We only want the PNP ops. */
+#include <stdint.h>
#include <arch/io.h>
+#include <device/pnp_type.h>
+
+#ifdef __SIMPLE_DEVICE__
+
+static __always_inline void pnp_write_config(
+ pnp_devfn_t dev, uint8_t reg, uint8_t value)
+{
+ unsigned int port = dev >> 8;
+ outb(reg, port);
+ outb(value, port + 1);
+}
+
+static __always_inline uint8_t pnp_read_config(
+ pnp_devfn_t dev, uint8_t reg)
+{
+ unsigned int port = dev >> 8;
+ outb(reg, port);
+ return inb(port + 1);
+}
+
+static __always_inline
+void pnp_set_logical_device(pnp_devfn_t dev)
+{
+ unsigned int device = dev & 0xff;
+ pnp_write_config(dev, 0x07, device);
+}
+
+static __always_inline
+void pnp_set_enable(pnp_devfn_t dev, int enable)
+{
+ pnp_write_config(dev, 0x30, enable?0x1:0x0);
+}
+
+static __always_inline
+int pnp_read_enable(pnp_devfn_t dev)
+{
+ return !!pnp_read_config(dev, 0x30);
+}
+
+static __always_inline
+void pnp_set_iobase(pnp_devfn_t dev, unsigned int index, unsigned int iobase)
+{
+ pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
+ pnp_write_config(dev, index + 1, iobase & 0xff);
+}
+
+static __always_inline
+uint16_t pnp_read_iobase(pnp_devfn_t dev, unsigned int index)
+{
+ return ((uint16_t)(pnp_read_config(dev, index)) << 8)
+ | pnp_read_config(dev, index + 1);
+}
+
+static __always_inline
+void pnp_set_irq(pnp_devfn_t dev, unsigned int index, unsigned int irq)
+{
+ pnp_write_config(dev, index, irq);
+}
+
+static __always_inline
+void pnp_set_drq(pnp_devfn_t dev, unsigned int index, unsigned int drq)
+{
+ pnp_write_config(dev, index, drq & 0xff);
+}
+
+#endif /* __SIMPLE_DEVICE__ */
#endif