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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-08-11 17:49:06 -0500
committerMartin Roth <martinroth@google.com>2015-11-23 23:02:16 +0100
commit44e4a4e4db23677c960591d3209004f4f8b80326 (patch)
tree9632043a5f0c475ede792b585b71c60022913e4a /src/include
parentff8ccf05b04714ae86ed947841de718699a09d2c (diff)
downloadcoreboot-44e4a4e4db23677c960591d3209004f4f8b80326.tar.xz
southbridge/amd/sr5650: Add IOMMU support
Change-Id: I2083d0c5653515c27d4626c62a6499b850f7547b Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12044 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 664ac495d8..72f1ece6d2 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -429,6 +429,7 @@
#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV12 0x5A20
#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV13 0x5A1E
#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV8 0x5A21
+#define PCI_DEVICE_ID_AMD_SR5650_IOMMU 0x5A23
#define PCI_DEVICE_ID_AMD_CZ_HDA 0x157A
#define PCI_DEVICE_ID_AMD_CZ_LPC 0x790E