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authorSubrata Banik <subrata.banik@intel.com>2019-01-07 14:24:27 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-01-08 12:33:54 +0000
commit458297c8ba237808a3cdf698f9c7c561b13c0b6c (patch)
treeeee9b7efcf956514dc2c5f2c74dd51fa90f7bb9d /src/include
parentd0b7adac7a61795213f4d3bb0345a4f90eb7568a (diff)
downloadcoreboot-458297c8ba237808a3cdf698f9c7c561b13c0b6c.tar.xz
soc/intel/icelake: Increase bootblock size
This patch fixes icelake build brokenness due to bootblock size issue. Increase the bootblock size to 48K to match skylake. With UART enabled we are very near the 32K limit, and with upcoming changes to add USB devices in devicetree for a icelake board it is over the current 32K limit. BUG=b:122485106 TEST=Able to build dragonegg Change-Id: I66706e66ac1bce677fe11022d0eef44b9efc2e76 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/30702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
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