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author | Rudolf Marek <r.marek@assembler.cz> | 2013-05-27 16:06:43 +0200 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-06-24 00:52:50 +0200 |
commit | 88ebbeb7e2a914330c869147bacb190b4270532f (patch) | |
tree | a103bcdc268657fdd803ac22e6b40e1e13b82399 /src/include | |
parent | 81d3d7d00173eafff0ef134bdf1ee5e632f3868a (diff) | |
download | coreboot-88ebbeb7e2a914330c869147bacb190b4270532f.tar.xz |
AMD Fam15tn: Add IOMMU BAR allocation to northbridge
For IOMMU we need to allocate a 512 KB BAR in a non-standard
location. Use the standard allocator for that and limit the BAR
to 32-bits to be compatible with older systems.
Change-Id: I44414ce6b264b7f1c086a9b1c7ea275a0830205e
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3314
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index f5ba7f791c..3ad6351a44 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -287,6 +287,7 @@ #define PCI_DEVICE_ID_AMD_15H_MODEL_000F_NB_HT 0x1600 #define PCI_DEVICE_ID_AMD_15H_MODEL_001F_NB_HT 0x1400 #define PCI_DEVICE_ID_AMD_10H_NB_HT 0x1200 +#define PCI_DEVICE_ID_AMD_15H_NB_IOMMU 0x1419 #define PCI_DEVICE_ID_ATI_SB600_LPC 0x438D #define PCI_DEVICE_ID_ATI_SB600_SATA 0x4380 |