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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-08 10:05:16 -0800
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-13 17:22:14 +0100
commitdb469a689b7090e3cdec654367eb26636d38dad7 (patch)
tree549faf3b1e27b32aea3d0104ed81a46d41506c33 /src/include
parent6083c7ebc790c408185cfdeb22c5e83f59630ec7 (diff)
downloadcoreboot-db469a689b7090e3cdec654367eb26636d38dad7.tar.xz
src/include: Fix indent for case labels
Fix the following error detected by checkpatch.pl: ERROR: switch and case should be at the same indent TEST=Build and run on Galileo Gen2 Change-Id: I92f00254c7fcb79a5ecd4ba5e19a757cfe5c11fa Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18683 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cpu/x86/lapic.h36
1 files changed, 18 insertions, 18 deletions
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index 540e985b0a..7e3a96d042 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -80,24 +80,24 @@ struct __xchg_dummy { unsigned long a[100]; };
static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
{
switch (size) {
- case 1:
- __asm__ __volatile__("xchgb %b0,%1"
- :"=q" (x)
- :"m" (*__xg(ptr)), "0" (x)
- :"memory");
- break;
- case 2:
- __asm__ __volatile__("xchgw %w0,%1"
- :"=r" (x)
- :"m" (*__xg(ptr)), "0" (x)
- :"memory");
- break;
- case 4:
- __asm__ __volatile__("xchgl %0,%1"
- :"=r" (x)
- :"m" (*__xg(ptr)), "0" (x)
- :"memory");
- break;
+ case 1:
+ __asm__ __volatile__("xchgb %b0,%1"
+ :"=q" (x)
+ :"m" (*__xg(ptr)), "0" (x)
+ :"memory");
+ break;
+ case 2:
+ __asm__ __volatile__("xchgw %w0,%1"
+ :"=r" (x)
+ :"m" (*__xg(ptr)), "0" (x)
+ :"memory");
+ break;
+ case 4:
+ __asm__ __volatile__("xchgl %0,%1"
+ :"=r" (x)
+ :"m" (*__xg(ptr)), "0" (x)
+ :"memory");
+ break;
}
return x;
}