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author | Christian Walter <christian.walter@9elements.com> | 2019-06-06 12:48:29 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2019-06-08 11:22:25 +0000 |
commit | e4c09d9137322928c952d5559bc2d0bd8205587c (patch) | |
tree | e40a0edf1ab97557745318a5ded7b646c60398f0 /src/include | |
parent | 7f9f3d0cf3924eb64ba20732ffb7a51db8bd0292 (diff) | |
download | coreboot-e4c09d9137322928c952d5559bc2d0bd8205587c.tar.xz |
src/soc/intel/skylake/bootblock: Add SPT C236 to PCH Table
Add Skylake C236 to the PCH Table. The one which was already in there is
actually the CM236 and not the C236. This can be checked in datasheet:
100-series-chipset-datasheet-vol-1 p. 25.
Change-Id: I435927f15e9d3219886375426b09c68632dfe3d9
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/device/pci_ids.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index fd90396dc0..dae5c9aceb 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2696,8 +2696,8 @@ #define PCI_DEVICE_ID_INTEL_SPT_H_Q170 0xa146 #define PCI_DEVICE_ID_INTEL_SPT_H_Q150 0xa147 #define PCI_DEVICE_ID_INTEL_SPT_H_B150 0xa148 -#define PCI_DEVICE_ID_INTEL_KBP_H_C236 0xa149 -#define PCI_DEVICE_ID_INTEL_SPT_H_C236 0xa150 +#define PCI_DEVICE_ID_INTEL_SPT_H_C236 0xa149 +#define PCI_DEVICE_ID_INTEL_SPT_H_CM236 0xa150 #define PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM 0xa14e #define PCI_DEVICE_ID_INTEL_SPT_H_H110 0xa143 #define PCI_DEVICE_ID_INTEL_SPT_H_QM170 0xa14d |