diff options
| author | Eric Biederman <ebiederm@xmission.com> | 2004-12-10 20:50:43 +0000 |
|---|---|---|
| committer | Eric Biederman <ebiederm@xmission.com> | 2004-12-10 20:50:43 +0000 |
| commit | ec01aa98d0a12f857137c469b15226e30a625331 (patch) | |
| tree | ca70536c9ca2ed705bdc1b71d0adadc91f88d79a /src/include | |
| parent | a7dd86970619976265c2cc167668fa11da07e139 (diff) | |
| download | coreboot-ec01aa98d0a12f857137c469b15226e30a625331.tar.xz | |
- Fix the definition of the linuxbios table so all of the compilers
will generate the struct lb_memory_range the same.
- Add a few pci_ids.
- Small readabiltiy clean ups to debug_dev
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/boot/linuxbios_tables.h | 9 | ||||
| -rw-r--r-- | src/include/device/pci_ids.h | 5 |
2 files changed, 11 insertions, 3 deletions
diff --git a/src/include/boot/linuxbios_tables.h b/src/include/boot/linuxbios_tables.h index 5f37993807..9288d3b23c 100644 --- a/src/include/boot/linuxbios_tables.h +++ b/src/include/boot/linuxbios_tables.h @@ -57,14 +57,17 @@ struct lb_record { #define LB_TAG_MEMORY 0x0001 +struct lb_uint64 { + uint32_t lo; + uint32_t hi; +}; struct lb_memory_range { - uint64_t start; - uint64_t size; + struct lb_uint64 start; + struct lb_uint64 size; uint32_t type; #define LB_MEM_RAM 1 /* Memory anyone can use */ #define LB_MEM_RESERVED 2 /* Don't use this memory region */ #define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ - }; struct lb_memory { diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 93f72e0fe4..c7bd7c3c29 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -1793,6 +1793,7 @@ #define PCI_DEVICE_ID_INTEL_6300ESB_USB2 0x25aa #define PCI_DEVICE_ID_INTEL_6300ESB_USB3 0x25ad #define PCI_DEVICE_ID_INTEL_6300ESB_SATA 0x25a3 +#define PCI_DEVICE_ID_INTEL_6300ESB_PIC1 0x25ac #define PCI_DEVICE_ID_INTEL_80310 0x530d #define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120 #define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121 @@ -1815,6 +1816,10 @@ #define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 #define PCI_DEVICE_ID_INTEL_82451NX 0x84ca #define PCI_DEVICE_ID_INTEL_82454NX 0x84cb +#define PCI_DEVICE_ID_INTEL_PCIE_PA 0x3595 +#define PCI_DEVICE_ID_INTEL_PCIE_PA1 0x3596 +#define PCI_DEVICE_ID_INTEL_PCIE_PB 0x3597 +#define PCI_DEVICE_ID_INTEL_PCIE_PC 0x3599 #define PCI_DEVICE_ID_INTEL_82801DBM_1E0 0x2448 #define PCI_DEVICE_ID_INTEL_82801DBM_1F0 0x24cc |