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authorZheng Bao <zheng.bao@amd.com>2011-03-27 16:39:58 +0000
committerZheng Bao <Zheng.Bao@amd.com>2011-03-27 16:39:58 +0000
commit98fcc09cf9955e24376d15f6fe13f02545547276 (patch)
treef1acc0faa6bf962243778caa8132c805b2f77e68 /src/include
parent8a281880a36967361e7eb39056c4ff228f97c9a3 (diff)
downloadcoreboot-98fcc09cf9955e24376d15f6fe13f02545547276.tar.xz
Add AMD SR56x0 support.
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6462 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 5dbd111895..6286cd66c7 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -365,6 +365,23 @@
#define PCI_DEVICE_ID_ATI_RS785MC_INT_GFX 0x9713
#define PCI_DEVICE_ID_ATI_RS785D_INT_GFX 0x9714
+#define PCI_DEVICE_ID_AMD_SR5650_HT 0x5A13
+#define PCI_DEVICE_ID_AMD_SR5670_HT 0x5A12
+#define PCI_DEVICE_ID_AMD_SR5690_HT 0x5A10
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE 0x5A12
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV2 0x5A16
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV3 0x5A17
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV4 0x5A18
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV5 0x5A19
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV6 0x5A1A
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV7 0x5A1B
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV9 0x5A1C
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV10 0x5A1D
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV11 0x5A1F
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV12 0x5A20
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV13 0x5A1E
+#define PCI_DEVICE_ID_AMD_SR5650_PCIE_DEV8 0x5A21
+
#define PCI_VENDOR_ID_VLSI 0x1004
#define PCI_DEVICE_ID_VLSI_82C592 0x0005
#define PCI_DEVICE_ID_VLSI_82C593 0x0006