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authorDuncan Laurie <dlaurie@chromium.org>2012-08-13 09:37:42 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-11-12 04:21:59 +0100
commit04c5bae39054aedbff1865d9dd2633260c23ece3 (patch)
tree21eb979f2c2341143be67decbcd25443108b6c27 /src/include
parent2c485180a8613695b4886299efca4276fd17be31 (diff)
downloadcoreboot-04c5bae39054aedbff1865d9dd2633260c23ece3.tar.xz
Define post codes for OS boot and resume
And move the pre-hardwaremain post code to 0x79 so it comes before hardwaremain at 0x80. Emit these codes from ACPI OS resume vector as well as the finalize step in bd82x6x southbridge. Change-Id: I7f258998a2f6549016e99b67bc21f7c59d2bcf9e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1702 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/console/post_codes.h21
1 files changed, 17 insertions, 4 deletions
diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h
index c716b7251f..0cf7d6bc55 100644
--- a/src/include/console/post_codes.h
+++ b/src/include/console/post_codes.h
@@ -83,6 +83,13 @@
#define POST_ENTRY_C_START 0x13
/**
+ * \brief Pre call to hardwaremain()
+ *
+ * POSTed right before hardwaremain is called from c_start.S
+ */
+#define POST_PRE_HARDWAREMAIN 0x79
+
+/**
* \brief Entry into coreboot in hardwaremain (RAM)
*
* This is the first call in hardwaremain.c. If this code is POSTed, then
@@ -166,12 +173,18 @@
#define POST_DEAD_CODE 0xee
/**
- * \brief Pre call to hardwaremain()
+ * \brief Final code before OS resumes
*
- * POSTed right before hardwaremain is called from c_start.S
- * TODO: Change this code to a lower number
+ * Called right before jumping to the OS resume vector.
+ */
+#define POST_OS_RESUME 0xfd
+
+/**
+ * \brief Final code before OS boots
+ *
+ * This may not be called depending on the payload used.
*/
-#define POST_PRE_HARDWAREMAIN 0xfe
+#define POST_OS_BOOT 0xfe
/**
* \brief Elfload fail or die() called