diff options
author | Martin Roth <martin@coreboot.org> | 2020-11-09 13:13:27 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-16 12:09:58 +0000 |
commit | 0639bff5bac84975258f4059eaf130582e1aee94 (patch) | |
tree | ec34d0da7473a08d5605239c74c85af7965e601f /src/include | |
parent | a0e5046a08d991cafe34d9d91baf4dc82f4d86e8 (diff) | |
download | coreboot-0639bff5bac84975258f4059eaf130582e1aee94.tar.xz |
src: Update some incorrect config options in comments
This is a trivial patch to fix some comments that were generating
notes in the kconfig lint test.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I26a95f17e82910f50c62215be5c29780fe98e29a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47366
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/rules.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/include/rules.h b/src/include/rules.h index d30b2b896a..6ebb37e804 100644 --- a/src/include/rules.h +++ b/src/include/rules.h @@ -63,10 +63,11 @@ /* * NOTE: "verstage" code may either run as a separate stage or linked into the - * bootblock/romstage, depending on the setting of CONFIG_SEPARATE_VERSTAGE. The - * ENV_SEPARATE_VERSTAGE macro will only return true for "verstage" code when - * CONFIG_SEPARATE_VERSTAGE=y, otherwise that code will have ENV_BOOTBLOCK or - * ENV_ROMSTAGE set (depending on the CONFIG_VBOOT_STARTS_IN_... options). + * bootblock/romstage, depending on the setting of the VBOOT_SEPARATE_VERSTAGE + * kconfig option. The ENV_SEPARATE_VERSTAGE macro will only return true for + * "verstage" code when CONFIG(VBOOT_SEPARATE_VERSTAGE) is true, otherwise that + * code will have ENV_BOOTBLOCK or ENV_ROMSTAGE set (depending on the + * "VBOOT_STARTS_IN_"... kconfig options). */ #elif defined(__VERSTAGE__) #define ENV_DECOMPRESSOR 0 |