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authorKrishna Prasad Bhat <krishna.p.bhat.d@intel.com>2020-09-17 19:42:39 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-29 06:52:40 +0000
commit20f580b6f9238e5f80b8888a9fd6addd86c8c5a7 (patch)
tree7b0c84f8d75ad52e590562aafe44a0f847d64e21 /src/include
parent8e60571f6e751547a10a9db42817be404278bd01 (diff)
downloadcoreboot-20f580b6f9238e5f80b8888a9fd6addd86c8c5a7.tar.xz
soc/intel/jasperlake: Add IGD, MCH Device ID
Add IGD Device ID and MCH Device ID for Jasperlake. Reference is taken from Jasperlake EDS volume 1(Document Number: 613601). TEST=Build and boot Jasperlake platform. Change-Id: I00ee7950ffa378b428a76bf367a9a05ab287e7ed Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45481 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: V Sowmya <v.sowmya@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index e9674dffca..d40d867ce2 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3638,6 +3638,7 @@
#define PCI_DEVICE_ID_INTEL_JSL_GT1 0x4E51
#define PCI_DEVICE_ID_INTEL_JSL_GT2 0x4E71
#define PCI_DEVICE_ID_INTEL_JSL_GT3 0x4E61
+#define PCI_DEVICE_ID_INTEL_JSL_GT4 0x4E55
#define PCI_DEVICE_ID_INTEL_ADL_GT0 0x46ff
#define PCI_DEVICE_ID_INTEL_ADL_GT1 0x4600
@@ -3729,6 +3730,7 @@
#define PCI_DEVICE_ID_INTEL_JSL_ID_2 0x4e26
#define PCI_DEVICE_ID_INTEL_JSL_ID_3 0x4e12
#define PCI_DEVICE_ID_INTEL_JSL_ID_4 0x4e14
+#define PCI_DEVICE_ID_INTEL_JSL_ID_5 0x4e24
#define PCI_DEVICE_ID_INTEL_ADL_S_ID_1 0x4660
#define PCI_DEVICE_ID_INTEL_ADL_S_ID_2 0x4664