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authorKane Chen <kane.chen@intel.com>2014-07-27 12:54:44 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-27 09:55:21 +0100
commit33faac643d8cbd521668f163df0a83865435e8c9 (patch)
tree23675b242eeaa063d608573515ef2cd071c6ae89 /src/include
parentdc27ca9fcb64481b4557968ab3582e0db7831cf8 (diff)
downloadcoreboot-33faac643d8cbd521668f163df0a83865435e8c9.tar.xz
smbios: add funtion for smbios type17
Add smbios type 17 which can optionally be implemented at the platform or mainboard level In order to create SMBIOS type17, you will need to fill memory_info data BUG=None BRANCH=None TEST=Compile successfully on rambi and samus Boot to chromeOS on samus and rambi Original-Change-Id: Ie4da89135c879d7a687305d423103fcfcbb96e3f Original-Signed-off-by: Kane Chen <kane.chen@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/210005 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> (cherry picked from commit 634b899ba41242caa800d7b570f3a339c738db77) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I61d1e8b1d32d43f0011b0f93966d57646ea0eb63 Reviewed-on: http://review.coreboot.org/8955 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cbmem.h4
-rw-r--r--src/include/memory_info.h46
-rw-r--r--src/include/smbios.h18
-rw-r--r--src/include/spd.h8
4 files changed, 75 insertions, 1 deletions
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 2f86b85a1f..49eaf48414 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -72,6 +72,7 @@
#define CBMEM_ID_POWER_STATE 0x50535454
#define CBMEM_ID_SMM_SAVE_SPACE 0x07e9acee
#define CBMEM_ID_RAM_OOPS 0x05430095
+#define CBMEM_ID_MEMINFO 0x494D454D
#define CBMEM_ID_NONE 0x00000000
#define CBMEM_ID_AGESA_RUNTIME 0x41474553
#define CBMEM_ID_HOB_POINTER 0x484f4221
@@ -115,7 +116,8 @@ struct cbmem_id_to_name {
{ CBMEM_ID_SMM_SAVE_SPACE, "SMM BACKUP " }, \
{ CBMEM_ID_REFCODE_CACHE, "REFCODE $ " }, \
{ CBMEM_ID_POWER_STATE, "POWER STATE" }, \
- { CBMEM_ID_RAM_OOPS, "RAMOOPS " },
+ { CBMEM_ID_RAM_OOPS, "RAMOOPS " }, \
+ { CBMEM_ID_MEMINFO, "MEM INFO " },
struct cbmem_entry;
diff --git a/src/include/memory_info.h b/src/include/memory_info.h
new file mode 100644
index 0000000000..4613628dab
--- /dev/null
+++ b/src/include/memory_info.h
@@ -0,0 +1,46 @@
+/*
+ * Memory information
+ *
+ * Copyright (C) 2014, Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version
+ * 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _MEMORY_INFO_H_
+#define _MEMORY_INFO_H_
+
+/*
+ * If this table is filled and put in CBMEM,
+ * then these info in CBMEM will be used to generate smbios type 17 table
+ */
+struct dimm_info {
+ uint32_t dimm_size;
+ uint16_t ddr_type;
+ uint16_t ddr_frequency;
+ uint8_t rank_per_dimm;
+ uint8_t channel_num;
+ uint8_t dimm_num;
+ uint8_t bank_locator;
+ /* The 5th byte is '\0' for the end of string */
+ uint8_t serial[5];
+ /* The 19th byte is '\0' for the end of string */
+ uint8_t module_part_number[19];
+ uint16_t mod_id;
+ uint8_t mod_type;
+ uint8_t bus_width;
+} __attribute__((packed));
+
+struct memory_info {
+ uint8_t dimm_cnt;
+ /* Maximum num of dimm is 8 */
+ struct dimm_info dimm[8];
+} __attribute__((packed));
+
+#endif
diff --git a/src/include/smbios.h b/src/include/smbios.h
index 90609067b3..bd7bef57db 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -34,6 +34,24 @@ u8 smbios_mainboard_enclosure_type(void);
#define BIOS_EXT1_CHARACTERISTICS_ACPI (1 << 0)
#define BIOS_EXT2_CHARACTERISTICS_TARGET (1 << 2)
+typedef enum {
+ MEMORY_FORMFACTOR_OTHER = 0x01,
+ MEMORY_FORMFACTOR_UNKNOWN = 0x02,
+ MEMORY_FORMFACTOR_SIMM = 0x03,
+ MEMORY_FORMFACTOR_SIP = 0x04,
+ MEMORY_FORMFACTOR_CHIP = 0x05,
+ MEMORY_FORMFACTOR_DIP = 0x06,
+ MEMORY_FORMFACTOR_ZIP = 0x07,
+ MEMORY_FORMFACTOR_PROPRIETARY_CARD = 0x08,
+ MEMORY_FORMFACTOR_DIMM = 0x09,
+ MEMORY_FORMFACTOR_TSOP = 0x0a,
+ MEMORY_FORMFACTOR_ROC = 0x0b,
+ MEMORY_FORMFACTOR_RIMM = 0x0c,
+ MEMORY_FORMFACTOR_SODIMM = 0x0d,
+ MEMORY_FORMFACTOR_SRIMM = 0x0e,
+ MEMORY_FORMFACTOR_FBDIMM = 0x0f,
+} smbios_memory_form_factor;
+
#define SMBIOS_STATE_SAFE 3
typedef enum {
SMBIOS_BIOS_INFORMATION=0,
diff --git a/src/include/spd.h b/src/include/spd.h
index 2b07fb134b..ef0cf5a6a1 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -237,4 +237,12 @@ enum spd_memory_type {
#define RC62 62
#define RC63 63
+#define SPD_UNDEFINED 0
+#define SPD_RDIMM 1
+#define SPD_UDIMM 2
+#define SPD_SODIMM 3
+#define SPD_MICRO_DIMM 4
+#define SPD_MINI_RDIMM 5
+#define SPD_MINI_UDIMM 6
+
#endif