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authorArthur Heymans <arthur@aheymans.xyz>2019-11-02 22:22:55 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-04 11:37:54 +0000
commita751eec799d00058fe0f40653ab831f0a4b8aeab (patch)
treecdd03ace5e1e37fa9db7a7a087937b00c96222ac /src/include
parentf6a8c5a493855370a5d695ed8cde2d03c659d68a (diff)
downloadcoreboot-a751eec799d00058fe0f40653ab831f0a4b8aeab.tar.xz
cpu/intel/em64t101: Add Nehalem to compatibility list
Change-Id: I15a1c824b92e18f9963c60659ead92c988d1239b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36588 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cpu/intel/em64t101_save_state.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/intel/em64t101_save_state.h b/src/include/cpu/intel/em64t101_save_state.h
index b8bb2db58f..7493c85049 100644
--- a/src/include/cpu/intel/em64t101_save_state.h
+++ b/src/include/cpu/intel/em64t101_save_state.h
@@ -20,6 +20,7 @@
/* Intel Revision 30101 SMM State-Save Area
* The following processor architectures use this:
+ * - Nehalem
* - SandyBridge
* - IvyBridge
* - Haswell