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authorStefan Reinauer <stepan@coresystems.de>2010-04-25 21:43:29 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-25 21:43:29 +0000
commite08c29e0e7f1c1e8682bdb66ce0c51d168fdd502 (patch)
treecd0596cfcfa193adf76f87f60c71e9960a1d7216 /src/include
parent5f5436f935412a339e127e0863d39df8a2308830 (diff)
downloadcoreboot-e08c29e0e7f1c1e8682bdb66ce0c51d168fdd502.tar.xz
a single place for the romstage stack for copy_and_run.
geode lx and amd opteron don't use this yet. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5499 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cpu/x86/stack.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/include/cpu/x86/stack.h b/src/include/cpu/x86/stack.h
new file mode 100644
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+++ b/src/include/cpu/x86/stack.h
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __CPU_X86_STACK_H
+#define __CPU_X86_STACK_H
+
+/* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This
+ * makes sure that we stay completely within the 1M-64K of memory that we
+ * preserve for suspend/resume. This is basically HIGH_MEMORY_SAFE (see
+ * cbmem.h)
+ */
+
+#define ROMSTAGE_STACK_OFFSET ( (1024 - 64) * 1024 )
+#define ROMSTAGE_STACK (CONFIG_RAMBASE + ROMSTAGE_STACK_OFFSET)
+
+#endif