diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-06 18:01:04 -0800 |
---|---|---|
committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-09 17:16:09 +0100 |
commit | 0ca2a0654ca4b403e8a54d558bce07a862820a9d (patch) | |
tree | 86c845b441c8ae4824bf6178943148ec94441c6d /src/include | |
parent | 75d8d8da47a3cc759d7395f5b0ef91ba13a59e51 (diff) | |
download | coreboot-0ca2a0654ca4b403e8a54d558bce07a862820a9d.tar.xz |
src/include: Fix unsigned warnings
Fix warning detected by checkpatch.pl:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
BRANCH=none
BUG=None
TEST=Build and run on Galileo Gen2
Change-Id: I23d9b4b715aa74acc387db8fb8d3c73bd5cabfaa
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18607
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/cpu/amd/amdfam10_sysconf.h | 52 | ||||
-rw-r--r-- | src/include/cpu/amd/amdk8_sysconf.h | 18 | ||||
-rw-r--r-- | src/include/cpu/amd/mtrr.h | 4 | ||||
-rw-r--r-- | src/include/cpu/x86/msr.h | 18 | ||||
-rw-r--r-- | src/include/cpu/x86/mtrr.h | 3 | ||||
-rw-r--r-- | src/include/cpu/x86/tsc.h | 4 | ||||
-rw-r--r-- | src/include/delay.h | 6 | ||||
-rw-r--r-- | src/include/device/device.h | 18 | ||||
-rw-r--r-- | src/include/device/dram/ddr3.h | 30 | ||||
-rw-r--r-- | src/include/device/i2c.h | 36 | ||||
-rw-r--r-- | src/include/device/path.h | 36 | ||||
-rw-r--r-- | src/include/device/pci.h | 31 | ||||
-rw-r--r-- | src/include/device/pci_ehci.h | 2 | ||||
-rw-r--r-- | src/include/device/pnp.h | 4 | ||||
-rw-r--r-- | src/include/device/resource.h | 6 | ||||
-rw-r--r-- | src/include/pc80/mc146818rtc.h | 3 | ||||
-rw-r--r-- | src/include/thread.h | 7 |
17 files changed, 145 insertions, 133 deletions
diff --git a/src/include/cpu/amd/amdfam10_sysconf.h b/src/include/cpu/amd/amdfam10_sysconf.h index ade78c8b75..bff65ec917 100644 --- a/src/include/cpu/amd/amdfam10_sysconf.h +++ b/src/include/cpu/amd/amdfam10_sysconf.h @@ -21,41 +21,41 @@ #include <cpu/x86/msr.h> struct p_state_t { - unsigned corefreq; - unsigned power; - unsigned transition_lat; - unsigned busmaster_lat; - unsigned control; - unsigned status; + unsigned int corefreq; + unsigned int power; + unsigned int transition_lat; + unsigned int busmaster_lat; + unsigned int control; + unsigned int status; }; struct amdfam10_sysconf_t { //ht - unsigned hc_possible_num; - unsigned pci1234[HC_POSSIBLE_NUM]; - unsigned hcdn[HC_POSSIBLE_NUM]; - unsigned hcid[HC_POSSIBLE_NUM]; //record ht chain type - unsigned sbdn; - unsigned sblk; + unsigned int hc_possible_num; + unsigned int pci1234[HC_POSSIBLE_NUM]; + unsigned int hcdn[HC_POSSIBLE_NUM]; + unsigned int hcid[HC_POSSIBLE_NUM]; //record ht chain type + unsigned int sbdn; + unsigned int sblk; - unsigned nodes; - unsigned ht_c_num; // we only can have 32 ht chain at most - unsigned ht_c_conf_bus[HC_NUMS]; // 4-->32: 4:segn, 8:bus_max, 8:bus_min, 4:linkn, 6: nodeid, 2: enable - unsigned io_addr_num; - unsigned conf_io_addr[HC_NUMS]; - unsigned conf_io_addrx[HC_NUMS]; - unsigned mmio_addr_num; - unsigned conf_mmio_addr[HC_NUMS*2]; // mem and pref mem - unsigned conf_mmio_addrx[HC_NUMS*2]; - unsigned segbit; - unsigned hcdn_reg[HC_NUMS]; // it will be used by get_pci1234 + unsigned int nodes; + unsigned int ht_c_num; // we only can have 32 ht chain at most + unsigned int ht_c_conf_bus[HC_NUMS]; // 4-->32: 4:segn, 8:bus_max, 8:bus_min, 4:linkn, 6: nodeid, 2: enable + unsigned int io_addr_num; + unsigned int conf_io_addr[HC_NUMS]; + unsigned int conf_io_addrx[HC_NUMS]; + unsigned int mmio_addr_num; + unsigned int conf_mmio_addr[HC_NUMS*2]; // mem and pref mem + unsigned int conf_mmio_addrx[HC_NUMS*2]; + unsigned int segbit; + unsigned int hcdn_reg[HC_NUMS]; // it will be used by get_pci1234 msr_t msr_pstate[NODE_NUMS * 5]; // quad cores all cores in one node should be the same, and p0,..p5 - unsigned needs_update_pstate_msrs; + unsigned int needs_update_pstate_msrs; - unsigned bsp_apicid; + unsigned int bsp_apicid; int enabled_apic_ext_id; - unsigned lift_bsp_apicid; + unsigned int lift_bsp_apicid; int apicid_offset; void *mb; // pointer for mb related struct diff --git a/src/include/cpu/amd/amdk8_sysconf.h b/src/include/cpu/amd/amdk8_sysconf.h index 87bd4d5dc5..665f9f96b9 100644 --- a/src/include/cpu/amd/amdk8_sysconf.h +++ b/src/include/cpu/amd/amdk8_sysconf.h @@ -5,18 +5,18 @@ struct amdk8_sysconf_t { //ht - unsigned nodes; - unsigned hc_possible_num; - unsigned pci1234[HC_POSSIBLE_NUM]; - unsigned hcdn[HC_POSSIBLE_NUM]; - unsigned hcid[HC_POSSIBLE_NUM]; //record ht chain type - unsigned sbdn; - unsigned sblk; + unsigned int nodes; + unsigned int hc_possible_num; + unsigned int pci1234[HC_POSSIBLE_NUM]; + unsigned int hcdn[HC_POSSIBLE_NUM]; + unsigned int hcid[HC_POSSIBLE_NUM]; //record ht chain type + unsigned int sbdn; + unsigned int sblk; - unsigned hcdn_reg[4]; // it will be used by get_sblk_pci1234 + unsigned int hcdn_reg[4]; // it will be used by get_sblk_pci1234 int enabled_apic_ext_id; - unsigned lift_bsp_apicid; + unsigned int lift_bsp_apicid; int apicid_offset; void *mb; // pointer for mb related struct diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index 7da6cd1142..8099a3d1fe 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -42,7 +42,7 @@ void amd_setup_mtrrs(void); -static inline __attribute__((always_inline)) msr_t rdmsr_amd(unsigned index) +static inline __attribute__((always_inline)) msr_t rdmsr_amd(unsigned int index) { msr_t result; __asm__ __volatile__ ( @@ -53,7 +53,7 @@ static inline __attribute__((always_inline)) msr_t rdmsr_amd(unsigned index) return result; } -static inline __attribute__((always_inline)) void wrmsr_amd(unsigned index, msr_t msr) +static inline __attribute__((always_inline)) void wrmsr_amd(unsigned int index, msr_t msr) { __asm__ __volatile__ ( "wrmsr" diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index f830f3ba3b..c663d29c36 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -19,27 +19,27 @@ static void wrmsr(unsigned long index, msr_t msr) typedef struct msr_struct { - unsigned lo; - unsigned hi; + unsigned int lo; + unsigned int hi; } msr_t; typedef struct msrinit_struct { - unsigned index; + unsigned int index; msr_t msr; } msrinit_t; #if IS_ENABLED(CONFIG_SOC_SETS_MSRS) -msr_t soc_msr_read(unsigned index); -void soc_msr_write(unsigned index, msr_t msr); +msr_t soc_msr_read(unsigned int index); +void soc_msr_write(unsigned int index, msr_t msr); /* Handle MSR references in the other source code */ -static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index) +static inline __attribute__((always_inline)) msr_t rdmsr(unsigned int index) { return soc_msr_read(index); } -static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr) +static inline __attribute__((always_inline)) void wrmsr(unsigned int index, msr_t msr) { soc_msr_write(index, msr); } @@ -55,7 +55,7 @@ static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t ms * these functions to always be inlined by adding the qualifier * __attribute__((always_inline)) to their declaration. */ -static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index) +static inline __attribute__((always_inline)) msr_t rdmsr(unsigned int index) { msr_t result; __asm__ __volatile__ ( @@ -66,7 +66,7 @@ static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index) return result; } -static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr) +static inline __attribute__((always_inline)) void wrmsr(unsigned int index, msr_t msr) { __asm__ __volatile__ ( "wrmsr" diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index d9f38f57ee..fb8474a19d 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -87,7 +87,8 @@ void mtrr_use_temp_range(uintptr_t begin, size_t size, int type); #endif #if !defined(__ASSEMBLER__) && defined(__PRE_RAM__) && !defined(__ROMCC__) -void set_var_mtrr(unsigned reg, unsigned base, unsigned size, unsigned type); +void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size, + unsigned int type); int get_free_var_mtrr(void); #endif diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h index e4ca0e768f..5a7fbc2007 100644 --- a/src/include/cpu/x86/tsc.h +++ b/src/include/cpu/x86/tsc.h @@ -12,8 +12,8 @@ #endif struct tsc_struct { - unsigned lo; - unsigned hi; + unsigned int lo; + unsigned int hi; }; typedef struct tsc_struct tsc_t; diff --git a/src/include/delay.h b/src/include/delay.h index b3d8ed95da..8f894d2d30 100644 --- a/src/include/delay.h +++ b/src/include/delay.h @@ -3,7 +3,7 @@ void init_timer(void); -void udelay(unsigned usecs); -void mdelay(unsigned msecs); -void delay(unsigned secs); +void udelay(unsigned int usecs); +void mdelay(unsigned int msecs); +void delay(unsigned int secs); #endif /* DELAY_H */ diff --git a/src/include/device/device.h b/src/include/device/device.h index 284c039fc8..6fcb9ae8a4 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -85,7 +85,7 @@ struct bus { ROMSTAGE_CONST struct device * dev; /* This bridge device */ ROMSTAGE_CONST struct device * children; /* devices behind this bridge */ ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */ - unsigned bridge_ctrl; /* Bridge control register */ + unsigned int bridge_ctrl; /* Bridge control register */ uint16_t bridge_cmd; /* Bridge command register */ unsigned char link_num; /* The index of this link */ uint16_t secondary; /* secondary bus number */ @@ -93,9 +93,9 @@ struct bus { unsigned char cap; /* PCi capability offset */ uint32_t hcdn_reg; /* For HyperTransport link */ - unsigned reset_needed : 1; - unsigned disable_relaxed_ordering : 1; - unsigned ht_link_up : 1; + unsigned int reset_needed : 1; + unsigned int disable_relaxed_ordering : 1; + unsigned int ht_link_up : 1; }; /* @@ -119,8 +119,8 @@ struct device { ROMSTAGE_CONST struct device * next; /* chain of all devices */ struct device_path path; - unsigned vendor; - unsigned device; + unsigned int vendor; + unsigned int device; u16 subsystem_vendor; u16 subsystem_device; unsigned int class; /* 3 bytes: (base, sub, prog-if) */ @@ -201,11 +201,11 @@ device_t dev_find_path(device_t prev_match, enum device_path_type path_type); device_t dev_find_slot (unsigned int bus, unsigned int devfn); device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); device_t dev_find_slot_pnp(u16 port, u16 device); -device_t dev_find_lapic(unsigned apic_id); +device_t dev_find_lapic(unsigned int apic_id); int dev_count_cpu(void); -device_t add_cpu_device(struct bus *cpu_bus, unsigned apic_id, int enabled); -void set_cpu_topology(device_t cpu, unsigned node, unsigned package, unsigned core, unsigned thread); +device_t add_cpu_device(struct bus *cpu_bus, unsigned int apic_id, int enabled); +void set_cpu_topology(device_t cpu, unsigned int node, unsigned int package, unsigned int core, unsigned int thread); #define amd_cpu_topology(cpu, node, core) \ set_cpu_topology(cpu, node, 0, core, 0) diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 905aa8407a..bc9fca7495 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -106,35 +106,35 @@ typedef union dimm_flags_st { struct { /* Indicates if rank 1 of DIMM uses a mirrored pin mapping. See: * Annex K: Serial Presence Detect (SPD) for DDR3 SDRAM */ - unsigned pins_mirrored:1; + unsigned int pins_mirrored:1; /* Module can work at 1.50V - All DIMMS must be 1.5V operable */ - unsigned operable_1_50V:1; + unsigned int operable_1_50V:1; /* Module can work at 1.35V */ - unsigned operable_1_35V:1; + unsigned int operable_1_35V:1; /* Module can work at 1.20V */ - unsigned operable_1_25V:1; + unsigned int operable_1_25V:1; /* Has an 8-bit bus extension, meaning the DIMM supports ECC */ - unsigned is_ecc:1; + unsigned int is_ecc:1; /* DLL-Off Mode Support */ - unsigned dll_off_mode:1; + unsigned int dll_off_mode:1; /* Indicates a drive strength of RZQ/6 (40 Ohm) is supported */ - unsigned rzq6_supported:1; + unsigned int rzq6_supported:1; /* Indicates a drive strength of RZQ/7 (35 Ohm) is supported */ - unsigned rzq7_supported:1; + unsigned int rzq7_supported:1; /* Partial Array Self Refresh */ - unsigned pasr:1; + unsigned int pasr:1; /* On-die Thermal Sensor Readout */ - unsigned odts:1; + unsigned int odts:1; /* Auto Self Refresh */ - unsigned asr:1; + unsigned int asr:1; /* Extended temperature range supported */ - unsigned ext_temp_range:1; + unsigned int ext_temp_range:1; /* Operating at extended temperature requires 2X refresh rate */ - unsigned ext_temp_refresh:1; + unsigned int ext_temp_refresh:1; /* Thermal sensor incorporated */ - unsigned therm_sensor:1; + unsigned int therm_sensor:1; }; - unsigned raw; + unsigned int raw; } dimm_flags_t; /** diff --git a/src/include/device/i2c.h b/src/include/device/i2c.h index d8a793c716..6316748b85 100644 --- a/src/include/device/i2c.h +++ b/src/include/device/i2c.h @@ -40,27 +40,29 @@ struct i2c_seg int len; }; -int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int count); +int platform_i2c_transfer(unsigned int bus, struct i2c_seg *segments, + int count); #define SOFTWARE_I2C_MAX_BUS 10 /* increase as necessary */ struct software_i2c_ops { - void (*set_sda)(unsigned bus, int high); - void (*set_scl)(unsigned bus, int high); - int (*get_sda)(unsigned bus); - int (*get_scl)(unsigned bus); + void (*set_sda)(unsigned int bus, int high); + void (*set_scl)(unsigned int bus, int high); + int (*get_sda)(unsigned int bus); + int (*get_scl)(unsigned int bus); }; extern struct software_i2c_ops *software_i2c[]; -int software_i2c_transfer(unsigned bus, struct i2c_seg *segments, int count); -void software_i2c_wedge_ack(unsigned bus, u8 chip); -void software_i2c_wedge_read(unsigned bus, u8 chip, u8 reg, int bit_count); -void software_i2c_wedge_write(unsigned bus, u8 chip, u8 reg, int bit_count); +int software_i2c_transfer(unsigned int bus, struct i2c_seg *segments, + int count); +void software_i2c_wedge_ack(unsigned int bus, u8 chip); +void software_i2c_wedge_read(unsigned int bus, u8 chip, u8 reg, int bit_count); +void software_i2c_wedge_write(unsigned int bus, u8 chip, u8 reg, int bit_count); -int i2c_read_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t *data, +int i2c_read_field(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t *data, uint8_t mask, uint8_t shift); -int i2c_write_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t data, +int i2c_write_field(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t data, uint8_t mask, uint8_t shift); /* @@ -69,7 +71,7 @@ int i2c_write_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t data, * Need this ugly stub to arbitrate since I2C device drivers hardcode * 'i2c_transfer()' as their entry point. */ -static inline int i2c_transfer(unsigned bus, struct i2c_seg *segments, +static inline int i2c_transfer(unsigned int bus, struct i2c_seg *segments, int count) { if (CONFIG_SOFTWARE_I2C) @@ -84,7 +86,7 @@ static inline int i2c_transfer(unsigned bus, struct i2c_seg *segments, * * [start][slave addr][r][data][stop] */ -static inline int i2c_read_raw(unsigned bus, uint8_t chip, uint8_t *data, +static inline int i2c_read_raw(unsigned int bus, uint8_t chip, uint8_t *data, int len) { struct i2c_seg seg = @@ -97,7 +99,7 @@ static inline int i2c_read_raw(unsigned bus, uint8_t chip, uint8_t *data, * * [start][slave addr][w][data][stop] */ -static inline int i2c_write_raw(unsigned bus, uint8_t chip, uint8_t *data, +static inline int i2c_write_raw(unsigned int bus, uint8_t chip, uint8_t *data, int len) { struct i2c_seg seg = @@ -110,7 +112,7 @@ static inline int i2c_write_raw(unsigned bus, uint8_t chip, uint8_t *data, * * [start][slave addr][w][register addr][start][slave addr][r][data...][stop] */ -static inline int i2c_read_bytes(unsigned bus, uint8_t chip, uint8_t reg, +static inline int i2c_read_bytes(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t *data, int len) { struct i2c_seg seg[2]; @@ -132,7 +134,7 @@ static inline int i2c_read_bytes(unsigned bus, uint8_t chip, uint8_t reg, * * [start][slave addr][w][register addr][start][slave addr][r][data][stop] */ -static inline int i2c_readb(unsigned bus, uint8_t chip, uint8_t reg, +static inline int i2c_readb(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t *data) { struct i2c_seg seg[2]; @@ -154,7 +156,7 @@ static inline int i2c_readb(unsigned bus, uint8_t chip, uint8_t reg, * * [start][slave addr][w][register addr][data][stop] */ -static inline int i2c_writeb(unsigned bus, uint8_t chip, uint8_t reg, +static inline int i2c_writeb(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t data) { struct i2c_seg seg; diff --git a/src/include/device/path.h b/src/include/device/path.h index 849b579455..1eaa32fb57 100644 --- a/src/include/device/path.h +++ b/src/include/device/path.h @@ -40,64 +40,64 @@ enum device_path_type { struct domain_path { - unsigned domain; + unsigned int domain; }; struct pci_path { - unsigned devfn; + unsigned int devfn; }; struct pnp_path { - unsigned port; - unsigned device; + unsigned int port; + unsigned int device; }; struct i2c_path { - unsigned device; - unsigned mode_10bit; + unsigned int device; + unsigned int mode_10bit; }; struct spi_path { - unsigned cs; + unsigned int cs; }; struct apic_path { - unsigned apic_id; - unsigned package_id; - unsigned node_id; - unsigned core_id; - unsigned thread_id; + unsigned int apic_id; + unsigned int package_id; + unsigned int node_id; + unsigned int core_id; + unsigned int thread_id; }; struct ioapic_path { - unsigned ioapic_id; + unsigned int ioapic_id; }; struct cpu_cluster_path { - unsigned cluster; + unsigned int cluster; }; struct cpu_path { - unsigned id; + unsigned int id; }; struct cpu_bus_path { - unsigned id; + unsigned int id; }; struct generic_path { - unsigned id; - unsigned subid; + unsigned int id; + unsigned int subid; }; diff --git a/src/include/device/pci.h b/src/include/device/pci.h index e167752e92..8dc7c46d35 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -32,7 +32,8 @@ /* Common pci operations without a standard interface */ struct pci_operations { /* set the Subsystem IDs for the PCI device */ - void (*set_subsystem)(device_t dev, unsigned vendor, unsigned device); + void (*set_subsystem)(device_t dev, unsigned int vendor, + unsigned int device); void (*set_L1_ss_latency)(device_t dev, unsigned int off); }; @@ -69,26 +70,28 @@ void pci_dev_set_resources(device_t dev); void pci_dev_enable_resources(device_t dev); void pci_bus_enable_resources(device_t dev); void pci_bus_reset(struct bus *bus); -device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn); +device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned int devfn); void do_pci_scan_bridge(device_t bus, void (*do_scan_bus)(struct bus *bus, - unsigned min_devfn, unsigned max_devfn)); + unsigned int min_devfn, unsigned int max_devfn)); void pci_scan_bridge(device_t bus); -void pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn); +void pci_scan_bus(struct bus *bus, unsigned int min_devfn, + unsigned int max_devfn); -uint8_t pci_moving_config8(struct device *dev, unsigned reg); -uint16_t pci_moving_config16(struct device *dev, unsigned reg); -uint32_t pci_moving_config32(struct device *dev, unsigned reg); +uint8_t pci_moving_config8(struct device *dev, unsigned int reg); +uint16_t pci_moving_config16(struct device *dev, unsigned int reg); +uint32_t pci_moving_config32(struct device *dev, unsigned int reg); struct resource *pci_get_resource(struct device *dev, unsigned long index); -void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device); +void pci_dev_set_subsystem(device_t dev, unsigned int vendor, + unsigned int device); void pci_dev_init(struct device *dev); unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev); const char * pin_to_str(int pin); int get_pci_irq_pins(device_t dev, device_t *parent_bdg); -void pci_assign_irqs(unsigned bus, unsigned slot, +void pci_assign_irqs(unsigned int bus, unsigned int slot, const unsigned char pIntAtoD[4]); const char *get_pci_class_name(device_t dev); const char *get_pci_subclass_name(device_t dev); @@ -109,11 +112,13 @@ static inline const struct pci_operations *ops_pci(device_t dev) #endif /* ! __SIMPLE_DEVICE__ */ #ifdef __SIMPLE_DEVICE__ -unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last); -unsigned pci_find_capability(pci_devfn_t dev, unsigned cap); +unsigned int pci_find_next_capability(pci_devfn_t dev, unsigned int cap, + unsigned int last); +unsigned int pci_find_capability(pci_devfn_t dev, unsigned int cap); #else /* !__SIMPLE_DEVICE__ */ -unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last); -unsigned pci_find_capability(device_t dev, unsigned cap); +unsigned int pci_find_next_capability(device_t dev, unsigned int cap, + unsigned int last); +unsigned int pci_find_capability(device_t dev, unsigned int cap); #endif /* __SIMPLE_DEVICE__ */ void pci_early_bridge_init(void); diff --git a/src/include/device/pci_ehci.h b/src/include/device/pci_ehci.h index e80cf2bbab..42e1d8365f 100644 --- a/src/include/device/pci_ehci.h +++ b/src/include/device/pci_ehci.h @@ -23,7 +23,7 @@ #define EHCI_BAR_INDEX 0x10 #define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */ -pci_devfn_t pci_ehci_dbg_dev(unsigned hcd_idx); +pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx); u8 *pci_ehci_base_regs(pci_devfn_t dev); void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port); void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base); diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h index cfed7c708d..bb66317742 100644 --- a/src/include/device/pnp.h +++ b/src/include/device/pnp.h @@ -31,7 +31,7 @@ extern struct device_operations pnp_ops; /* PNP helper operations */ struct io_info { - unsigned mask, set; + unsigned int mask, set; }; struct pnp_info { @@ -64,7 +64,7 @@ struct pnp_info { #define PNP_MSCE 0x800000 struct io_info io0, io1, io2, io3; }; -struct resource *pnp_get_resource(device_t dev, unsigned index); +struct resource *pnp_get_resource(device_t dev, unsigned int index); void pnp_enable_devices(struct device *dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info); diff --git a/src/include/device/resource.h b/src/include/device/resource.h index 768c86d46a..7160eec74a 100644 --- a/src/include/device/resource.h +++ b/src/include/device/resource.h @@ -57,9 +57,9 @@ struct resource { struct device; struct bus; extern void compact_resources(struct device * dev); -extern struct resource *probe_resource(struct device *dev, unsigned index); -extern struct resource *new_resource(struct device * dev, unsigned index); -extern struct resource *find_resource(struct device * dev, unsigned index); +extern struct resource *probe_resource(struct device *dev, unsigned int index); +extern struct resource *new_resource(struct device * dev, unsigned int index); +extern struct resource *find_resource(struct device * dev, unsigned int index); extern resource_t resource_end(struct resource *resource); extern resource_t resource_max(struct resource *resource); extern void report_resource_stored(struct device * dev, struct resource *resource, const char *comment); diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 99fba9dbe5..9f4eb5adbe 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -184,7 +184,8 @@ void cmos_check_update_date(void); enum cb_err set_option(const char *name, void *val); enum cb_err get_option(void *dest, const char *name); -unsigned read_option_lowlevel(unsigned start, unsigned size, unsigned def); +unsigned int read_option_lowlevel(unsigned int start, unsigned int size, + unsigned int def); #else /* defined(__ROMCC__) */ #include <drivers/pc80/rtc/mc146818rtc_early.c> diff --git a/src/include/thread.h b/src/include/thread.h index 62f14c2c62..681ccdd9c7 100644 --- a/src/include/thread.h +++ b/src/include/thread.h @@ -50,7 +50,7 @@ int thread_run_until(void (*func)(void *), void *arg, boot_state_t state, boot_state_sequence_t seq); /* Return 0 on successful yield for the given amount of time, < 0 when thread * did not yield. */ -int thread_yield_microseconds(unsigned microsecs); +int thread_yield_microseconds(unsigned int microsecs); /* Allow and prevent thread cooperation on current running thread. By default * all threads are marked to be cooperative. That means a thread can yield @@ -74,7 +74,10 @@ void arch_prepare_thread(struct thread *t, #else static inline void threads_initialize(void) {} static inline int thread_run(void (*func)(void *), void *arg) { return -1; } -static inline int thread_yield_microseconds(unsigned microsecs) { return -1; } +static inline int thread_yield_microseconds(unsigned int microsecs) +{ + return -1; +} static inline void thread_cooperate(void) {} static inline void thread_prevent_coop(void) {} struct cpu_info; |