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authorSubrata Banik <subrata.banik@intel.com>2020-09-07 16:20:53 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-08 12:56:58 +0000
commit9209817acedd6db0369249ce094761df252f786d (patch)
treec67729cef37a4fafaa0aece593edb016b9b028e8 /src/include
parent627371722c7293c3f246439dea0704258cf7e67e (diff)
downloadcoreboot-9209817acedd6db0369249ce094761df252f786d.tar.xz
pci_ids: Add Alder Lake DTT PCI IDs
Add PCI IDs for Intel's Dynamic Tuning Technology (DTT) for ADL. Also add NULL terminator at end of pci_device_ids. Change-Id: If25b1f562567a833683b0b8796bd1d6cac0bd490 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45140 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index a7f0fecae5..cbb1975618 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3973,6 +3973,7 @@
#define PCI_DEVICE_ID_INTEL_CML_DTT 0x1903
#define PCI_DEVICE_ID_INTEL_TGL_DTT 0x9A03
#define PCI_DEVICE_ID_INTEL_JSL_DTT 0x4E03
+#define PCI_DEVICE_ID_INTEL_ADL_DTT 0x461d
#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291