summaryrefslogtreecommitdiff
path: root/src/include
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2013-03-22 22:09:46 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-29 19:54:00 +0100
commita75561415e75d3a4dc813fc061140570e39b7078 (patch)
tree8800dfe1ae2f4d3eff0f10610efc56653a7152ae /src/include
parentbb4e79a332f0a4f79d402c91b61010157d8a7886 (diff)
downloadcoreboot-a75561415e75d3a4dc813fc061140570e39b7078.tar.xz
resources: remove IORESOURCE_[UMA_FB|IGNORE_MTRR]
The IORESOURCE_UMA_FB and IORESOURCE_IGNORE_MTRR attributes on a resource provided hints to the MTRR algorithm. The IORESOURCE_UMA_FB directed the MTRR algorithm to setup a uncacheable space for the resource. The IORESOURCE_IGNORE_MTRR directed the MTRR algorithm to ignore this resource as it was used reserving RAM space. Now that the optimizing MTRR algorithm is in place there isn't a need for these flags. All IORESOURCE_IGNORE_MTRR users are handled by the MTRR code merging resources of the same cacheable type. The users of the IORESOURCE_UMA_FB will find that the default MTRR type calculation means there isn't a need for this flag any more. Change-Id: I4f62192edd9a700cb80fa7569caf49538f9b83b7 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2890 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/device.h6
-rw-r--r--src/include/device/resource.h2
2 files changed, 3 insertions, 5 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h
index b8dfbf51cf..44a9742ab8 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -207,16 +207,16 @@ void fixed_mem_resource(device_t dev, unsigned long index,
fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_CACHEABLE)
#define reserved_ram_resource(dev, idx, basek, sizek) \
- fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_CACHEABLE | IORESOURCE_RESERVE | IORESOURCE_IGNORE_MTRR)
+ fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_CACHEABLE | IORESOURCE_RESERVE)
#define bad_ram_resource(dev, idx, basek, sizek) \
reserved_ram_resource((dev), (idx), (basek), (sizek))
#define uma_resource(dev, idx, basek, sizek) \
- fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_RESERVE | IORESOURCE_UMA_FB)
+ fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_RESERVE)
#define mmio_resource(dev, idx, basek, sizek) \
- fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_RESERVE | IORESOURCE_IGNORE_MTRR)
+ fixed_mem_resource(dev, idx, basek, sizek, IORESOURCE_RESERVE)
void tolm_test(void *gp, struct device *dev, struct resource *new);
u32 find_pci_tolm(struct bus *bus);
diff --git a/src/include/device/resource.h b/src/include/device/resource.h
index ea1bab5696..6b66605a6a 100644
--- a/src/include/device/resource.h
+++ b/src/include/device/resource.h
@@ -21,8 +21,6 @@
* to the bus below.
*/
#define IORESOURCE_BRIDGE 0x00080000 /* The IO resource has a bus below it. */
-#define IORESOURCE_UMA_FB 0x00100000 /* UMA framebuffer */
-#define IORESOURCE_IGNORE_MTRR 0x00200000 /* The resource does not affect MTRR setup. */
#define IORESOURCE_RESERVE 0x10000000 /* The resource needs to be reserved in the coreboot table */
#define IORESOURCE_STORED 0x20000000 /* The IO resource assignment has been stored in the device */