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authorSubrata Banik <subrata.banik@intel.com>2020-08-03 14:29:25 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-08-05 05:38:14 +0000
commitf672f7ff7d6e1fd607c4348ac45132a1e3064585 (patch)
treeca4fe63e55f1885e63a6ccac4425def60e2d55c5 /src/include
parentd1c590a66654bdb6be6da85c539c9567be6234a0 (diff)
downloadcoreboot-f672f7ff7d6e1fd607c4348ac45132a1e3064585.tar.xz
soc/intel/common: Include Alder Lake device IDs
Add Alder Lake specific CPU, System Agent, PCH (Alder Point aka ADP), IGD device IDs. Document Number: 619501, 619362 Change-Id: I17ce56a220e4dce2db2e0e69561b3d6dac9e65a2 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44108 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h221
1 files changed, 221 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 35c86d9833..da41cb8b39 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2892,6 +2892,70 @@
#define PCI_DEVICE_ID_INTEL_MCC_ESPI_3 0x4b06
#define PCI_DEVICE_ID_INTEL_MCC_ESPI_4 0x4b07
#define PCI_DEVICE_ID_INTEL_JSP_SUPER_ESPI 0X4d87
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_0 0x7a00
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_1 0x7a01
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_2 0x7a02
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_3 0x7a03
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_4 0x7a04
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_5 0x7a05
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_6 0x7a06
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_7 0x7a07
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_8 0x7a08
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_9 0x7a09
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_10 0x7a0a
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_11 0x7a0b
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_12 0x7a0c
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_13 0x7a0d
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_14 0x7a0e
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_15 0x7a0f
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_16 0x7a10
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_17 0x7a11
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_18 0x7a12
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_19 0x7a13
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_20 0x7a14
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_21 0x7a15
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_22 0x7a16
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_23 0x7a17
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_24 0x7a18
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_25 0x7a19
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_26 0x7a1a
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_27 0x7a1b
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_28 0x7a1c
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_29 0x7a1d
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30 0x7a1e
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31 0x7a1f
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_0 0x7a80
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_1 0x7a81
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_2 0x7a82
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_3 0x7a83
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_4 0x7a84
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_5 0x7a85
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_6 0x7a86
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_7 0x7a87
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_8 0x7a88
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_9 0x7a89
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_10 0x7a8a
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_11 0x7a8b
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_12 0x7a8c
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_13 0x7a8d
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_14 0x7a8e
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_15 0x7a8f
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_16 0x7a90
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_17 0x7a91
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_18 0x7a92
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_19 0x7a93
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_20 0x7a94
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_21 0x7a95
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_22 0x7a96
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_23 0x7a97
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_24 0x7a98
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_25 0x7a99
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_26 0x7a9a
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_27 0x7a9b
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_28 0x7a9c
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_29 0x7a9d
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_30 0x7a9e
+#define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_31 0x7a9f
/* Intel PCIE device ids */
#define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1 0x9d10
@@ -3130,6 +3194,48 @@
#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP6 0x4b3d
#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP7 0x4b3e
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP1 0x51b8
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP2 0x51b9
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP3 0x51ba
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP4 0x51bb
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP5 0x51bc
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP6 0x51bd
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP7 0x51be
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP8 0x51bf
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP9 0x51b0
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP10 0x51b1
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP11 0x51b2
+#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP12 0x51b3
+
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP1 0x7ab8
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP2 0x7ab9
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP3 0x7aba
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP4 0x7abb
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP5 0x7abc
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP6 0x7abd
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP7 0x7abe
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP8 0x7abf
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP9 0x7ab0
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP10 0x7ab1
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP11 0x7ab2
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP12 0x7ab3
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP13 0x7ab4
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP14 0x7ab5
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP15 0x7ab6
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP16 0x7ab7
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP17 0x7ac0
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP18 0x7ac1
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP19 0x7ac2
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP20 0x7ac3
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP21 0x7ac4
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP22 0x7ac5
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP23 0x7ac6
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP24 0x7ac7
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP25 0x7ac8
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP26 0x7ac9
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP27 0x7aca
+#define PCI_DEVICE_ID_INTEL_ADP_S_PCIE_RP28 0x7acb
+
/* Intel SATA device Ids */
#define PCI_DEVICE_ID_INTEL_SPT_U_SATA 0x9d03
#define PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA 0x9d07
@@ -3184,6 +3290,8 @@
#define PCI_DEVICE_ID_INTEL_TGP_PMC 0xa0a1
#define PCI_DEVICE_ID_INTEL_MCC_PMC 0x4b21
#define PCI_DEVICE_ID_INTEL_JSP_PMC 0x4da1
+#define PCI_DEVICE_ID_INTEL_ADP_P_PMC 0x7a21
+#define PCI_DEVICE_ID_INTEL_ADP_S_PMC 0x7aa1
/* Intel I2C device Ids */
#define PCI_DEVICE_ID_INTEL_SPT_I2C0 0x9d60
@@ -3262,6 +3370,20 @@
#define PCI_DEVICE_ID_INTEL_JSP_I2C4 0x4dc5
#define PCI_DEVICE_ID_INTEL_JSP_I2C5 0x4dc6
+#define PCI_DEVICE_ID_INTEL_ADP_P_I2C0 0x51e8
+#define PCI_DEVICE_ID_INTEL_ADP_P_I2C1 0x51e9
+#define PCI_DEVICE_ID_INTEL_ADP_P_I2C2 0x51ea
+#define PCI_DEVICE_ID_INTEL_ADP_P_I2C3 0x51eb
+#define PCI_DEVICE_ID_INTEL_ADP_P_I2C4 0x51c5
+#define PCI_DEVICE_ID_INTEL_ADP_P_I2C5 0x51c6
+
+#define PCI_DEVICE_ID_INTEL_ADP_S_I2C0 0x7acc
+#define PCI_DEVICE_ID_INTEL_ADP_S_I2C1 0x7acd
+#define PCI_DEVICE_ID_INTEL_ADP_S_I2C2 0x7ace
+#define PCI_DEVICE_ID_INTEL_ADP_S_I2C3 0x7acf
+#define PCI_DEVICE_ID_INTEL_ADP_S_I2C4 0x7afc
+#define PCI_DEVICE_ID_INTEL_ADP_S_I2C5 0x7afd
+
/* Intel UART device Ids */
#define PCI_DEVICE_ID_INTEL_SPT_UART0 0x9d27
#define PCI_DEVICE_ID_INTEL_SPT_UART1 0x9d28
@@ -3305,6 +3427,22 @@
#define PCI_DEVICE_ID_INTEL_JSP_UART1 0x4da9
#define PCI_DEVICE_ID_INTEL_JSP_UART2 0x4dc7
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART0 0x51a8
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART1 0x51a9
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART2 0x51c7
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART3 0x51da
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART4 0x51db
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART5 0x51dc
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART6 0x51dd
+
+#define PCI_DEVICE_ID_INTEL_ADP_S_UART0 0x7aa8
+#define PCI_DEVICE_ID_INTEL_ADP_S_UART1 0x7aa9
+#define PCI_DEVICE_ID_INTEL_ADP_S_UART2 0x7afe
+#define PCI_DEVICE_ID_INTEL_ADP_S_UART3 0x7adc
+#define PCI_DEVICE_ID_INTEL_ADP_S_UART4 0x7add
+#define PCI_DEVICE_ID_INTEL_ADP_S_UART5 0x7ade
+#define PCI_DEVICE_ID_INTEL_ADP_S_UART6 0x7adf
+
/* Intel SPI device Ids */
#define PCI_DEVICE_ID_INTEL_SPT_SPI1 0x9d24
#define PCI_DEVICE_ID_INTEL_SPT_SPI2 0x9d29
@@ -3355,6 +3493,24 @@
#define PCI_DEVICE_ID_INTEL_JSP_SPI2 0x4dfb
#define PCI_DEVICE_ID_INTEL_JSP_HWSEQ_SPI 0x4da4
+#define PCI_DEVICE_ID_INTEL_ADP_P_HWSEQ_SPI 0x51a4
+#define PCI_DEVICE_ID_INTEL_ADP_P_SPI0 0x51aa
+#define PCI_DEVICE_ID_INTEL_ADP_P_SPI1 0x51ab
+#define PCI_DEVICE_ID_INTEL_ADP_P_SPI2 0x51fb
+#define PCI_DEVICE_ID_INTEL_ADP_P_SPI3 0x51fd
+#define PCI_DEVICE_ID_INTEL_ADP_P_SPI4 0x51fe
+#define PCI_DEVICE_ID_INTEL_ADP_P_SPI5 0x51de
+#define PCI_DEVICE_ID_INTEL_ADP_P_SPI6 0x51df
+
+#define PCI_DEVICE_ID_INTEL_ADP_S_HWSEQ_SPI 0x7aa4
+#define PCI_DEVICE_ID_INTEL_ADP_S_SPI0 0x7aaa
+#define PCI_DEVICE_ID_INTEL_ADP_S_SPI1 0x7aab
+#define PCI_DEVICE_ID_INTEL_ADP_S_SPI2 0x7afb
+#define PCI_DEVICE_ID_INTEL_ADP_S_SPI3 0x7af9
+#define PCI_DEVICE_ID_INTEL_ADP_S_SPI4 0x7afa
+#define PCI_DEVICE_ID_INTEL_ADP_S_SPI5 0x7aee
+#define PCI_DEVICE_ID_INTEL_ADP_S_SPI6 0x7aef
+
/* Intel IGD device Ids */
#define PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2 0x1902
#define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM 0x1906
@@ -3468,6 +3624,20 @@
#define PCI_DEVICE_ID_INTEL_JSL_GT1 0x4E51
#define PCI_DEVICE_ID_INTEL_JSL_GT2 0x4E71
+#define PCI_DEVICE_ID_INTEL_ADL_GT0 0x46ff
+#define PCI_DEVICE_ID_INTEL_ADL_GT1 0x4600
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_1 0x4601
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_2 0x4602
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_3 0x4603
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_4 0x4610
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_5 0x4611
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_6 0x4612
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_7 0x4613
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_8 0x4618
+#define PCI_DEVICE_ID_INTEL_ADL_GT1_9 0x4619
+#define PCI_DEVICE_ID_INTEL_ADL_P_GT2 0x46a0
+#define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680
+
/* Intel Northbridge Ids */
#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0
#define PCI_DEVICE_ID_INTEL_GLK_NB 0x31f0
@@ -3533,6 +3703,30 @@
#define PCI_DEVICE_ID_INTEL_JSL_ID_3 0x4e12
#define PCI_DEVICE_ID_INTEL_JSL_ID_4 0x4e14
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_1 0x4660
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_2 0x4664
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_3 0x4668
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_4 0x466c
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_5 0x4670
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_6 0x4640
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_7 0x4644
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_8 0x4648
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_9 0x464c
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_10 0x4650
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_11 0x4630
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_12 0x4610
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_13 0x4673
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_14 0x4623
+#define PCI_DEVICE_ID_INTEL_ADL_S_ID_15 0x0060
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_1 0x4602
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_2 0x460a
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_3 0x4641
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_4 0x4649
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_5 0x4621
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_6 0x4609
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_7 0x4601
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_8 0x4661
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_9 0x467f
/* Intel SMBUS device Ids */
#define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS 0x9d23
#define PCI_DEVICE_ID_INTEL_SPT_H_SMBUS 0xa123
@@ -3546,6 +3740,8 @@
#define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS 0xa0a3
#define PCI_DEVICE_ID_INTEL_MCC_SMBUS 0x4b23
#define PCI_DEVICE_ID_INTEL_JSP_SMBUS 0x4da3
+#define PCI_DEVICE_ID_INTEL_ADP_P_SMBUS 0xa0a3
+#define PCI_DEVICE_ID_INTEL_ADP_S_SMBUS 0x7aa3
/* Intel XHCI device Ids */
#define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8
@@ -3564,6 +3760,8 @@
#define PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI 0x9a13
#define PCI_DEVICE_ID_INTEL_MCC_XHCI 0x4b7d
#define PCI_DEVICE_ID_INTEL_JSP_XHCI 0x4ded
+#define PCI_DEVICE_ID_INTEL_ADP_P_XHCI 0x51ed
+#define PCI_DEVICE_ID_INTEL_ADP_S_XHCI 0x7ae0
/* Intel P2SB device Ids */
#define PCI_DEVICE_ID_INTEL_APL_P2SB 0x5a92
@@ -3581,6 +3779,8 @@
#define PCI_DEVICE_ID_INTEL_TGL_P2SB 0xa0a0
#define PCI_DEVICE_ID_INTEL_EHL_P2SB 0x4b20
#define PCI_DEVICE_ID_INTEL_JSP_P2SB 0x4da0
+#define PCI_DEVICE_ID_INTEL_ADP_P_P2SB 0x7a20
+#define PCI_DEVICE_ID_INTEL_ADP_S_P2SB 0x7aa0
/* Intel SRAM device Ids */
#define PCI_DEVICE_ID_INTEL_APL_SRAM 0x5aec
@@ -3593,6 +3793,8 @@
#define PCI_DEVICE_ID_INTEL_TGL_SRAM 0xa0ef
#define PCI_DEVICE_ID_INTEL_MCC_SRAM 0x4b7f
#define PCI_DEVICE_ID_INTEL_JSP_SRAM 0x4def
+#define PCI_DEVICE_ID_INTEL_ADP_P_SRAM 0x7a6f
+#define PCI_DEVICE_ID_INTEL_ADP_S_SRAM 0x7aa7
/* Intel AUDIO device Ids */
#define PCI_DEVICE_ID_INTEL_APL_AUDIO 0x5a98
@@ -3611,6 +3813,15 @@
#define PCI_DEVICE_ID_INTEL_TGL_AUDIO 0xa0c8
#define PCI_DEVICE_ID_INTEL_MCC_AUDIO 0x4b55
#define PCI_DEVICE_ID_INTEL_JSP_AUDIO 0x4dc8
+#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_1 0x7ad0
+#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_2 0x7ad1
+#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_3 0x7ad2
+#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_4 0x7ad3
+#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_5 0x7ad4
+#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_6 0x7ad5
+#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_7 0x7ad6
+#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_8 0x7ad7
+#define PCI_DEVICE_ID_INTEL_ADP_P_AUDIO 0x51c8
/* Intel HECI/ME device Ids */
#define PCI_DEVICE_ID_INTEL_APL_CSE0 0x5a9a
@@ -3636,6 +3847,14 @@
#define PCI_DEVICE_ID_INTEL_JSP_CSE1 0x4de1
#define PCI_DEVICE_ID_INTEL_JSP_CSE2 0x4de4
#define PCI_DEVICE_ID_INTEL_JSP_CSE3 0x4de5
+#define PCI_DEVICE_ID_INTEL_ADP_P_CSE0 0x51e0
+#define PCI_DEVICE_ID_INTEL_ADP_P_CSE1 0x51e1
+#define PCI_DEVICE_ID_INTEL_ADP_P_CSE2 0x51e4
+#define PCI_DEVICE_ID_INTEL_ADP_P_CSE3 0x51e5
+#define PCI_DEVICE_ID_INTEL_ADP_S_CSE0 0x7ae8
+#define PCI_DEVICE_ID_INTEL_ADP_S_CSE1 0x7ae9
+#define PCI_DEVICE_ID_INTEL_ADP_S_CSE2 0x7aec
+#define PCI_DEVICE_ID_INTEL_ADP_S_CSE3 0x7aed
/* Intel XDCI device Ids */
#define PCI_DEVICE_ID_INTEL_APL_XDCI 0x5aaa
@@ -3650,6 +3869,8 @@
#define PCI_DEVICE_ID_INTEL_TGP_TCSS_XDCI 0x9a15
#define PCI_DEVICE_ID_INTEL_MCC_XDCI 0x4b7e
#define PCI_DEVICE_ID_INTEL_JSP_XDCI 0x4dee
+#define PCI_DEVICE_ID_INTEL_ADP_P_XDCI 0x51ee
+#define PCI_DEVICE_ID_INTEL_ADP_S_XDCI 0x7ae1
/* Intel SD device Ids */
#define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca