summaryrefslogtreecommitdiff
path: root/src/include
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2007-05-29 10:37:52 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-05-29 10:37:52 +0000
commit1410c2d2192c4f2e782ac9af97c9df0165c3974e (patch)
tree480da58f1adfd2c4e7e9632cfe19049ef0ce2105 /src/include
parent861f96403777c8f4475ca94613c5142075dd0cdf (diff)
downloadcoreboot-1410c2d2192c4f2e782ac9af97c9df0165c3974e.tar.xz
Intel 82371EB: Add IDE init support.
In a mainboard's Config.lb file you can configure whether the primary and/or secondary IDE interfaces shall be enabled. Also, various fixups in the rest of the southbridge code, most notably the early SMBus code, plus some documentation improvements. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Corey Osgood <corey_osgood@verizon.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 791b8ea528..539ca3ad38 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -1813,6 +1813,11 @@
#define PCI_DEVICE_ID_INTEL_82371AB 0x7111
#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112
#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113
+#define PCI_DEVICE_ID_INTEL_82371AB_ISA 0x7110
+#define PCI_DEVICE_ID_INTEL_82371AB_IDE 0x7111
+#define PCI_DEVICE_ID_INTEL_82371AB_USB 0x7112
+#define PCI_DEVICE_ID_INTEL_82371AB_ACPI 0x7113 /* Same as SMB */
+#define PCI_DEVICE_ID_INTEL_82371AB_SMB 0x7113 /* Same as ACPI */
#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411
#define PCI_DEVICE_ID_INTEL_82801AA_2 0x2412