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authorRonald G. Minnich <rminnich@gmail.com>2003-07-11 14:51:29 +0000
committerRonald G. Minnich <rminnich@gmail.com>2003-07-11 14:51:29 +0000
commita3c708b5d2b4857b19a992ae9694a29e0fa8d9a2 (patch)
tree617507dd374d6a38777f92a0794f33f91ed8b5ba /src/include
parent2fceb77c47a168df38ca7f3b6b57ff9acc71679b (diff)
downloadcoreboot-a3c708b5d2b4857b19a992ae9694a29e0fa8d9a2.tar.xz
static configuration. Needs new keyword per greg to enable inclusion of a
part-specific struct into the tree. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/chip.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/include/device/chip.h b/src/include/device/chip.h
index 75e69120f3..ea57ea4b5c 100644
--- a/src/include/device/chip.h
+++ b/src/include/device/chip.h
@@ -1,7 +1,8 @@
/* chips are arbitrary chips (superio, southbridge, etc.)
* They have private structures that define chip resources and default
* settings. They have four externally visible functions for control.
- * new settings are provided as ascii strings.
+ * They have a generic component which applies to all chips for
+ * path, etc.
*/
/* some of the types of resources chips can control */
@@ -30,6 +31,7 @@ struct lpt_ports {
struct chip;
+/* there is one of these for each TYPE of chip */
struct chip_control {
void (*alloc)(struct chip *s);
void (*pre_pci_init)(struct chip *s);
@@ -46,5 +48,9 @@ struct chip {
struct chip_control *control; /* for this device */
char *path; /* can be 0, in which case the default is taken */
char *configuration; /* can be 0. */
+ int irq;
+ struct chip *next, *children;
+ /* there is one of these for each INSTANCE of a chip */
+ void *chip_info; /* the dreaded "void *" */
};