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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-30 13:23:32 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-07 12:35:42 +0000 |
| commit | 6683e409d3688217e70f1f19deab152790b0f495 (patch) | |
| tree | 965070f130e9b367631c746ab219aa73f3569238 /src/include | |
| parent | d1a0c5770803e45dabecf6094fccb9895ea76d10 (diff) | |
| download | coreboot-6683e409d3688217e70f1f19deab152790b0f495.tar.xz | |
usbdebug: Refactor early enable
Always sanity check for EHCI class device and move
PCI function power enablement up.
Change-Id: I1eebe813fbb420738af2d572178213fc660f392a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20826
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ehci.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/include/device/pci_ehci.h b/src/include/device/pci_ehci.h index 48178c8e1f..9d18bcc798 100644 --- a/src/include/device/pci_ehci.h +++ b/src/include/device/pci_ehci.h @@ -23,10 +23,13 @@ #define EHCI_BAR_INDEX 0x10 #define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */ +/* Return PCI BDF for an EHCI controller by a given index. PCI function + * must already be powered to respond to configuration requests. + */ pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx); + u8 *pci_ehci_base_regs(pci_devfn_t dev); void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port); -void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base); #ifndef __PRE_RAM__ #if !IS_ENABLED(CONFIG_USBDEBUG) |