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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-06 21:50:21 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-06 21:50:21 +0000 |
| commit | 8f2c616dbc7f36bf63d61960c2e14c6ca1c5af22 (patch) | |
| tree | b1ede5972569c6aeb57961a5fdbd219019902c8f /src/include | |
| parent | 233f186e95cf76d3a5bb5a7224769f63c36c5931 (diff) | |
| download | coreboot-8f2c616dbc7f36bf63d61960c2e14c6ca1c5af22.tar.xz | |
No warnings day, next round.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/x86/cache.h | 20 | ||||
| -rw-r--r-- | src/include/cpu/x86/mtrr.h | 35 |
2 files changed, 54 insertions, 1 deletions
diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index 55d39382db..be27f1d9ea 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -1,3 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Eric W. Biederman + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + #ifndef CPU_X86_CACHE #define CPU_X86_CACHE @@ -17,6 +36,7 @@ static inline void invd(void) { asm volatile("invd" ::: "memory"); } + static inline void wbinvd(void) { asm volatile ("wbinvd"); diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 2da2beefc9..667c7ad916 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -31,7 +31,6 @@ #define MTRRfix4K_F0000_MSR 0x26e #define MTRRfix4K_F8000_MSR 0x26f - #if !defined (ASSEMBLY) && !defined(__PRE_RAM__) #include <device/device.h> void enable_fixed_mtrr(void); @@ -42,5 +41,39 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res); void x86_setup_fixed_mtrrs(void); #endif +/* Validate CONFIG_XIP_ROM_SIZE and CONFIG_XIP_ROM_BASE */ +#if defined(CONFIG_XIP_ROM_SIZE) && !defined(CONFIG_XIP_ROM_BASE) +# error "CONFIG_XIP_ROM_SIZE without CONFIG_XIP_ROM_BASE" +#endif +#if defined(CONFIG_XIP_ROM_BASE) && !defined(CONFIG_XIP_ROM_SIZE) +# error "CONFIG_XIP_ROM_BASE without CONFIG_XIP_ROM_SIZE" +#endif +#if !defined(CONFIG_RAMTOP) +# error "CONFIG_RAMTOP not defined" +#endif + +#if defined(CONFIG_XIP_ROM_SIZE) && ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE -1)) != 0) +# error "CONFIG_XIP_ROM_SIZE is not a power of 2" +#endif +#if defined(CONFIG_XIP_ROM_SIZE) && ((CONFIG_XIP_ROM_BASE % CONFIG_XIP_ROM_SIZE) != 0) +# error "CONFIG_XIP_ROM_BASE is not a multiple of CONFIG_XIP_ROM_SIZE" +#endif + +#if (CONFIG_RAMTOP & (CONFIG_RAMTOP -1)) != 0 +# error "CONFIG_RAMTOP must be a power of 2" +#endif + + +#if !defined (ASSEMBLY) +#if defined(CONFIG_XIP_ROM_SIZE) +# if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK + extern unsigned long AUTO_XIP_ROM_BASE; +# define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE +# else +# define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE +# endif +#endif + +#endif #endif /* CPU_X86_MTRR_H */ |