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author | Aaron Durbin <adurbin@chromium.org> | 2015-03-06 23:17:33 -0600 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2015-04-22 17:55:08 +0200 |
commit | bd74a4b2d25268f7035a4478da31f27baac2aecc (patch) | |
tree | 56740c02fe396df8ccf9fc2e7401542deeebf453 /src/lib/cbmem_stage_cache.c | |
parent | cac50506238507328b8ea0f4abd458869803e6c2 (diff) | |
download | coreboot-bd74a4b2d25268f7035a4478da31f27baac2aecc.tar.xz |
coreboot: common stage cache
Many chipsets were using a stage cache for reference code
or when using a relocatable ramstage. Provide a common
API for the chipsets to use while reducing code duplication.
Change-Id: Ia36efa169fe6bd8a3dbe07bf57a9729c7edbdd46
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8625
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/lib/cbmem_stage_cache.c')
-rw-r--r-- | src/lib/cbmem_stage_cache.c | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/src/lib/cbmem_stage_cache.c b/src/lib/cbmem_stage_cache.c new file mode 100644 index 0000000000..b9ee14e7be --- /dev/null +++ b/src/lib/cbmem_stage_cache.c @@ -0,0 +1,76 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <arch/early_variables.h> +#include <cbmem.h> +#include <stage_cache.h> +#include <string.h> + + +/* Provide empty implementations by default. */ +void __attribute__((weak)) stage_cache_create_empty(void) {} +void __attribute__((weak)) stage_cache_recover(void) {} + +/* Stage cache uses cbmem. */ +void stage_cache_add(int stage_id, struct prog *stage) +{ + struct stage_cache *meta; + void *c; + + meta = cbmem_add(CBMEM_ID_STAGEx_META + stage_id, sizeof(*meta)); + if (meta == NULL) + return; + meta->load_addr = (uintptr_t)prog_start(stage); + meta->entry_addr = (uintptr_t)prog_entry(stage); + + c = cbmem_add(CBMEM_ID_STAGEx_CACHE + stage_id, prog_size(stage)); + if (c == NULL) + return; + + memcpy(c, prog_start(stage), prog_size(stage)); +} + +void stage_cache_load_stage(int stage_id, struct prog *stage) +{ + struct stage_cache *meta; + const struct cbmem_entry *e; + void *c; + size_t size; + void *load_addr; + + prog_set_entry(stage, NULL, NULL); + + meta = cbmem_find(CBMEM_ID_STAGEx_META + stage_id); + if (meta == NULL) + return; + + e = cbmem_entry_find(CBMEM_ID_STAGEx_CACHE + stage_id); + + if (e == NULL) + return; + + c = cbmem_entry_start(e); + size = cbmem_entry_size(e); + load_addr = (void *)(uintptr_t)meta->load_addr; + + memcpy(load_addr, c, size); + + prog_set_area(stage, load_addr, size); + prog_set_entry(stage, (void *)(uintptr_t)meta->entry_addr, NULL); +} |